Lines Matching +full:opp +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
14 stdout-path = &uart1;
17 reg_1p8v: regulator-fixed-1v8 {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
24 reg_snvs: regulator-fixed-snvs {
25 compatible = "regulator-fixed";
26 regulator-name = "VDD_SNVS";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
32 &{/opp-table/opp-800000000} {
33 opp-microvolt = <1000000>;
36 &{/opp-table/opp-1000000000} {
37 opp-microvolt = <1000000>;
41 cpu-supply = <®_arm_dram>;
45 cpu-supply = <®_arm_dram>;
49 cpu-supply = <®_arm_dram>;
53 cpu-supply = <®_arm_dram>;
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_fec1>;
59 phy-mode = "rgmii-id";
60 phy-handle = <ðphy0>;
61 fsl,magic-packet;
64 #address-cells = <1>;
65 #size-cells = <0>;
67 ethphy0: ethernet-phy@4 {
68 compatible = "ethernet-phy-ieee802.3-c22";
70 interrupt-parent = <&gpio1>;
72 reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
73 reset-assert-us = <10000>;
74 reset-deassert-us = <300>;
80 clock-frequency = <400000>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_i2c1>;
85 i2c-mux@70 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_i2c1_pca9546>;
90 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
91 #address-cells = <1>;
92 #size-cells = <0>;
96 #address-cells = <1>;
97 #size-cells = <0>;
102 regulator-name = "VDD_ARM_DRAM_1V";
103 regulator-min-microvolt = <1000000>;
104 regulator-max-microvolt = <1000000>;
105 regulator-always-on;
111 #address-cells = <1>;
112 #size-cells = <0>;
117 regulator-name = "NVCC_DRAM_1P1V";
118 regulator-min-microvolt = <1100000>;
119 regulator-max-microvolt = <1100000>;
120 regulator-always-on;
126 #address-cells = <1>;
127 #size-cells = <0>;
132 regulator-name = "VDD_SOC_GPU_VPU";
133 regulator-min-microvolt = <900000>;
134 regulator-max-microvolt = <900000>;
135 regulator-always-on;
141 #address-cells = <1>;
142 #size-cells = <0>;
148 power-supply = <®_soc_gpu_vpu>;
152 power-supply = <®_soc_gpu_vpu>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_uart1>;
162 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
163 assigned-clock-rates = <400000000>;
164 pinctrl-names = "default", "state_100mhz", "state_200mhz";
165 pinctrl-0 = <&pinctrl_usdhc1>;
166 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
167 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
168 vqmmc-supply = <®_1p8v>;
169 vmmc-supply = <®_snvs>;
170 bus-width = <8>;
171 non-removable;
172 no-mmc-hs400;
173 no-sdio;
174 no-sd;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_wdog>;
181 fsl,ext-reset-output;
214 pinctrl_i2c1_pca9546: i2c1-pca9546grp {
243 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
258 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {