Lines Matching +full:0 +full:x1f
58 pinctrl-0 = <&pinctrl_fec1>;
65 #size-cells = <0>;
82 pinctrl-0 = <&pinctrl_i2c1>;
88 pinctrl-0 = <&pinctrl_i2c1_pca9546>;
89 reg = <0x70>;
92 #size-cells = <0>;
94 i2c1a: i2c@0 {
95 reg = <0>;
97 #size-cells = <0>;
101 reg = <0x60>;
112 #size-cells = <0>;
116 reg = <0x60>;
127 #size-cells = <0>;
131 reg = <0x60>;
142 #size-cells = <0>;
157 pinctrl-0 = <&pinctrl_uart1>;
165 pinctrl-0 = <&pinctrl_usdhc1>;
180 pinctrl-0 = <&pinctrl_wdog>;
188 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
189 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23
190 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
191 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
192 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
193 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
194 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
195 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
196 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
197 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0xd1
198 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
199 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
200 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
201 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0xd1
202 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x1
203 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x41
209 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000022
210 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000022
216 MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x49
222 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x45
223 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x45
229 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
230 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
231 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
232 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
233 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
234 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
235 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
236 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
237 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
238 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
239 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
245 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
246 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
247 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
248 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
249 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
250 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
251 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
252 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
253 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
254 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
260 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
261 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
262 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
263 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
264 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
265 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
266 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
267 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
268 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
269 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
275 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6