Lines Matching +full:cooling +full:- +full:levels
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
17 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
18 chassis-type = "embedded";
21 stdout-path = &uart4;
24 iio-hwmon {
25 compatible = "iio-hwmon";
26 io-channels = <&adc 0>, <&adc 1>;
42 compatible = "pwm-backlight";
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_backlight>;
46 brightness-levels = <0 4 8 16 32 64 128 255>;
47 default-brightness-level = <7>;
48 power-supply = <®_vcc_12v0>;
49 enable-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
53 clk_xtal25: clk-xtal25 {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <25000000>;
60 compatible = "gpio-usb-b-connector", "usb-b-connector";
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_usbcon0>;
65 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
69 remote-endpoint = <&usb3_dwc>;
74 fan0: pwm-fan {
75 compatible = "pwm-fan";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_pwmfan>;
78 fan-supply = <®_pwm_fan>;
79 #cooling-cells = <2>;
80 /* typical 25 kHz -> 40.000 nsec */
82 cooling-levels = <0 32 64 128 196 240>;
83 pulses-per-revolution = <2>;
84 interrupt-parent = <&gpio5>;
89 gpio-keys {
90 compatible = "gpio-keys";
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_gpiobutton>;
95 switch-1 {
99 wakeup-source;
102 switch-2 {
106 wakeup-source;
110 gpio-leds {
111 compatible = "gpio-leds";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_gpioled>;
115 led-0 {
118 function-enumerator = <0>;
120 linux,default-trigger = "default-on";
123 led-1 {
127 linux,default-trigger = "heartbeat";
130 led-2 {
133 function-enumerator = <1>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_lvdsdisplay>;
145 power-supply = <®_vcc_3v3>;
146 enable-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
151 reg_pwm_fan: regulator-pwm-fan {
152 compatible = "regulator-fixed";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_regpwmfan>;
155 regulator-name = "FAN_PWR";
156 regulator-min-microvolt = <12000000>;
157 regulator-max-microvolt = <12000000>;
159 enable-active-high;
160 vin-supply = <®_vcc_12v0>;
163 reg_usdhc2_vmmc: regulator-usdhc2 {
164 compatible = "regulator-fixed";
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
167 regulator-name = "VSD_3V3";
168 regulator-min-microvolt = <3300000>;
169 regulator-max-microvolt = <3300000>;
171 enable-active-high;
172 startup-delay-us = <100>;
173 off-on-delay-us = <12000>;
176 reg_vcc_12v0: regulator-12v0 {
177 compatible = "regulator-fixed";
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_reg12v0>;
180 regulator-name = "VCC_12V0";
181 regulator-min-microvolt = <12000000>;
182 regulator-max-microvolt = <12000000>;
184 enable-active-high;
187 reg_vcc_1v8: regulator-1v8 {
188 compatible = "regulator-fixed";
189 regulator-name = "VCC_1V8";
190 regulator-min-microvolt = <1800000>;
191 regulator-max-microvolt = <1800000>;
194 reg_vcc_3v3: regulator-3v3 {
195 compatible = "regulator-fixed";
196 regulator-name = "VCC_3V3";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
201 reg_vcc_5v0: regulator-5v0 {
202 compatible = "regulator-fixed";
203 regulator-name = "VCC_5V0";
204 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <5000000>;
208 reserved-memory {
209 #address-cells = <2>;
210 #size-cells = <2>;
214 no-map;
220 compatible = "shared-dma-pool";
223 alloc-ranges = <0 0x40000000 0 0xB0000000>;
224 linux,cma-default;
229 compatible = "fsl,imx-audio-tlv320aic32x4";
230 model = "tq-tlv320aic32x";
231 audio-cpu = <&sai3>;
232 audio-codec = <&tlv320aic3x04>;
235 thermal-zones {
236 soc-thermal {
238 soc_active0: trip-active0 {
244 soc_active1: trip-active1 {
250 soc_active2: trip-active2 {
257 cooling-maps {
260 cooling-device = <&fan0 1 1>;
265 cooling-device = <&fan0 2 2>;
270 cooling-device = <&fan0 3 3>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_ecspi1>;
280 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_ecspi2>;
287 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_ecspi3>;
294 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
301 spi-max-frequency = <1800000>;
302 vref-supply = <®_vcc_3v3>;
303 #io-channel-cells = <1>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_eqos_phy>;
310 phy-mode = "rgmii-id";
311 phy-handle = <ðphy3>;
315 compatible = "snps,dwmac-mdio";
316 #address-cells = <1>;
317 #size-cells = <0>;
319 ethphy3: ethernet-phy@3 {
320 compatible = "ethernet-phy-ieee802.3-c22";
322 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
323 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
324 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
325 ti,dp83867-rxctrl-strap-quirk;
326 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
327 reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
328 reset-assert-us = <500000>;
329 reset-deassert-us = <50000>;
330 enet-phy-lane-no-swap;
331 interrupt-parent = <&gpio4>;
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_fec>, <&pinctrl_fec_phy>;
340 phy-mode = "rgmii-id";
341 phy-handle = <ðphy0>;
342 fsl,magic-packet;
346 #address-cells = <1>;
347 #size-cells = <0>;
349 ethphy0: ethernet-phy@0 {
350 compatible = "ethernet-phy-ieee802.3-c22";
352 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
353 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
354 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
355 ti,dp83867-rxctrl-strap-quirk;
356 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
357 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
358 reset-assert-us = <500000>;
359 reset-deassert-us = <50000>;
360 enet-phy-lane-no-swap;
361 interrupt-parent = <&gpio4>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_flexcan1>;
370 xceiver-supply = <®_vcc_3v3>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&pinctrl_flexcan2>;
377 xceiver-supply = <®_vcc_3v3>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_gpio1>;
385 gpio-line-names = "GPO1", "GPO0", "", "GPO3",
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_hoggpio2>;
399 gpio-line-names = "", "", "", "",
408 perst-hog {
409 gpio-hog;
411 output-high;
412 line-name = "PERST#";
415 clkreq-hog {
416 gpio-hog;
419 line-name = "CLKREQ#";
422 pewake-hog {
423 gpio-hog;
426 line-name = "PEWAKE#";
431 gpio-line-names = "", "", "", "",
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_gpio4>;
445 gpio-line-names = "ENET0_RST#", "ENET0_INT#", "ENET1_RST#", "ENET1_INT#",
454 pcie-refclkreq-hog {
455 gpio-hog;
457 output-high;
458 line-name = "PCIE_REFCLK_OE#";
463 gpio-line-names = "", "", "", "LED2",
474 clock-frequency = <384000>;
475 pinctrl-names = "default", "gpio";
476 pinctrl-0 = <&pinctrl_i2c2>;
477 pinctrl-1 = <&pinctrl_i2c2_gpio>;
478 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
479 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
482 tlv320aic3x04: audio-codec@18 {
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_tlv320aic3x04>;
487 clock-names = "mclk";
489 reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
490 iov-supply = <®_vcc_1v8>;
491 ldoin-supply = <®_vcc_3v3>;
494 se97_1c: temperature-sensor@1c {
495 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
503 vcc-supply = <®_vcc_3v3>;
506 pcieclk: clock-generator@6a {
510 #clock-cells = <1>;
515 clock-frequency = <384000>;
516 pinctrl-names = "default", "gpio";
517 pinctrl-0 = <&pinctrl_i2c4>;
518 pinctrl-1 = <&pinctrl_i2c4_gpio>;
519 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
520 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
525 clock-frequency = <384000>;
526 pinctrl-names = "default", "gpio";
527 pinctrl-0 = <&pinctrl_i2c6>;
528 pinctrl-1 = <&pinctrl_i2c6_gpio>;
529 scl-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
530 sda-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_pcf85063>;
538 interrupt-parent = <&gpio4>;
543 fsl,clkreq-unsupported;
544 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
546 clock-names = "ref";
554 clock-names = "pcie", "pcie_bus", "pcie_aux";
555 assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
556 assigned-clock-rates = <10000000>;
557 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_pwm2>;
568 pinctrl-names = "default";
569 pinctrl-0 = <&pinctrl_pwm3>;
574 pinctrl-names = "default";
575 pinctrl-0 = <&pinctrl_sai3>;
576 assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
577 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
578 assigned-clock-rates = <12288000>;
579 fsl,sai-mclk-direction-output;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_uart1>;
590 assigned-clocks = <&clk IMX8MP_CLK_UART1>;
591 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_uart2>;
598 assigned-clocks = <&clk IMX8MP_CLK_UART2>;
599 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
604 pinctrl-names = "default";
605 pinctrl-0 = <&pinctrl_uart3>;
606 assigned-clocks = <&clk IMX8MP_CLK_UART3>;
607 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_uart4>;
619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_usb0>;
621 fsl,over-current-active-low;
626 fsl,disable-port-power-control;
627 fsl,permanently-attached;
632 vbus-supply = <®_vcc_5v0>;
637 vbus-supply = <®_vcc_5v0>;
643 hnp-disable;
644 srp-disable;
645 adp-disable;
647 usb-role-switch;
648 role-switch-default-mode = "peripheral";
653 remote-endpoint = <&usb_dr_connector>;
660 #address-cells = <1>;
661 #size-cells = <0>;
662 pinctrl-names = "default";
663 pinctrl-0 = <&pinctrl_usbhub>;
669 peer-hub = <&hub_3_0>;
670 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
671 vdd-supply = <®_vcc_3v3>;
677 peer-hub = <&hub_2_0>;
678 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
679 vdd-supply = <®_vcc_3v3>;
684 pinctrl-names = "default", "state_100mhz", "state_200mhz";
685 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
686 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
687 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
688 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
689 vmmc-supply = <®_usdhc2_vmmc>;
690 no-mmc;
691 no-sdio;
692 disable-wp;
693 bus-width = <4>;
839 pinctrl_i2c2_gpio: i2c2-gpiogrp {
849 pinctrl_i2c4_gpio: i2c4-gpiogrp {
859 pinctrl_i2c6_gpio: i2c6-gpiogrp {
956 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
966 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
976 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {