Lines Matching +full:0 +full:x1d0
25 reg = <0x0 0x40000000 0 0x80000000>;
67 pinctrl-0 = <&pinctrl_ecspi1>;
71 flash@0 {
74 reg = <0>;
81 partition@0 {
83 reg = <0x0 0x1e0000>;
88 reg = <0x1e0000 0x10000>;
93 reg = <0x1f0000 0x10000>;
102 pinctrl-0 = <&pinctrl_i2c1>;
107 reg = <0x25>;
109 pinctrl-0 = <&pinctrl_pmic>;
111 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
115 regulator-name = "+0V8_VDD_SOC (BUCK1)";
126 regulator-name = "+0V9_VDD_ARM (BUCK2)";
137 regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
177 regulator-name = "+0V8_VDD_SNVS (LDO2)";
193 regulator-name = "+0V9_VDD_PHY (LDO4)";
210 reg = <0x52>;
212 pinctrl-0 = <&pinctrl_rtc>;
220 pinctrl-0 = <&pinctrl_uart3>;
226 pinctrl-0 = <&pinctrl_usdhc1>;
238 pinctrl-0 = <&pinctrl_wdog>;
246 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
247 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
248 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
249 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
255 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
256 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
262 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
268 MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19
274 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
275 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
281 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
282 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
283 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
284 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
285 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
286 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
287 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0
288 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0
289 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0
290 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0
291 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
292 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190
298 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
299 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
300 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
301 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
302 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
303 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
304 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4
305 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4
306 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4
307 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4
308 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
309 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194
315 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
316 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
317 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
318 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
319 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
320 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
321 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6
322 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6
323 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6
324 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6
325 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
326 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196
332 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6