Lines Matching full:clocks

30 		clocks = <&spi0_lpcg 0>,
33 		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
46 		clocks = <&spi1_lpcg 0>,
49 		assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
62 		clocks = <&spi2_lpcg 0>,
65 		assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
78 		clocks = <&spi3_lpcg 0>,
81 		assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
90 		clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
93 		assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
104 		clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
107 		assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
118 		clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
121 		assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
132 		clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
135 		assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
147 		clocks = <&adma_pwm_lpcg 1>,
150 		assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
222 		clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>,
234 		clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>,
246 		clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>,
258 		clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>,
270 		clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>,
282 		clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>,
294 		clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>,
306 		clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>,
318 		clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,
329 		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
332 		assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
341 		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
344 		assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
353 		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
356 		assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
365 		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
368 		assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
380 		clocks = <&adc0_lpcg 0>,
383 		assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
395 		clocks = <&adc1_lpcg 0>,
398 		assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
409 		clocks = <&can0_lpcg 1>,
412 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
430 		clocks = <&can0_lpcg 1>,
433 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
451 		clocks = <&can0_lpcg 1>,
454 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
467 		clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>,
479 		clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>,
491 		clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>,
503 		clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>,
515 		clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>,
527 		clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>,
539 		clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>,