Lines Matching +full:5 +full:a9f0000
18 dma_subsys: bus@5a000000 {
24 lpspi0: spi@5a000000 {
42 lpspi1: spi@5a010000 {
60 lpspi2: spi@5a020000 {
73 dmas = <&edma2 5 0 0>, <&edma2 4 0 FSL_EDMA_RX>;
78 lpspi3: spi@5a030000 {
96 lpuart0: serial@5a060000 {
110 lpuart1: serial@5a070000 {
124 lpuart2: serial@5a080000 {
138 lpuart3: serial@5a090000 {
152 adma_pwm: pwm@5a190000 {
165 edma2: dma-controller@5a1f0000 {
204 spi0_lpcg: clock-controller@5a400000 {
216 spi1_lpcg: clock-controller@5a410000 {
228 spi2_lpcg: clock-controller@5a420000 {
240 spi3_lpcg: clock-controller@5a430000 {
252 uart0_lpcg: clock-controller@5a460000 {
264 uart1_lpcg: clock-controller@5a470000 {
276 uart2_lpcg: clock-controller@5a480000 {
288 uart3_lpcg: clock-controller@5a490000 {
300 adma_pwm_lpcg: clock-controller@5a590000 {
312 i2c0: i2c@5a800000 {
326 i2c1: i2c@5a810000 {
340 i2c2: i2c@5a820000 {
354 i2c3: i2c@5a830000 {
368 adc0: adc@5a880000 {
383 adc1: adc@5a890000 {
398 flexcan1: can@5a8d0000 {
415 flexcan2: can@5a8e0000 {
436 flexcan3: can@5a8f0000 {
457 edma3: dma-controller@5a9f0000 {
480 i2c0_lpcg: clock-controller@5ac00000 {
492 i2c1_lpcg: clock-controller@5ac10000 {
504 i2c2_lpcg: clock-controller@5ac20000 {
516 i2c3_lpcg: clock-controller@5ac30000 {
528 adc0_lpcg: clock-controller@5ac80000 {
540 adc1_lpcg: clock-controller@5ac90000 {
552 can0_lpcg: clock-controller@5acd0000 {