Lines Matching +full:0 +full:x2040000
12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
55 i-cache-size = <0xC000>;
67 reg = <0x100>;
69 d-cache-size = <0x8000>;
72 i-cache-size = <0xC000>;
84 reg = <0x101>;
86 d-cache-size = <0x8000>;
89 i-cache-size = <0xC000>;
101 reg = <0x200>;
103 d-cache-size = <0x8000>;
106 i-cache-size = <0xC000>;
118 reg = <0x201>;
120 d-cache-size = <0x8000>;
123 i-cache-size = <0xC000>;
135 reg = <0x300>;
137 d-cache-size = <0x8000>;
140 i-cache-size = <0xC000>;
152 reg = <0x301>;
154 d-cache-size = <0x8000>;
157 i-cache-size = <0xC000>;
169 reg = <0x400>;
171 d-cache-size = <0x8000>;
174 i-cache-size = <0xC000>;
186 reg = <0x401>;
188 d-cache-size = <0x8000>;
191 i-cache-size = <0xC000>;
203 reg = <0x500>;
205 d-cache-size = <0x8000>;
208 i-cache-size = <0xC000>;
220 reg = <0x501>;
222 d-cache-size = <0x8000>;
225 i-cache-size = <0xC000>;
237 reg = <0x600>;
239 d-cache-size = <0x8000>;
242 i-cache-size = <0xC000>;
254 reg = <0x601>;
256 d-cache-size = <0x8000>;
259 i-cache-size = <0xC000>;
271 reg = <0x700>;
273 d-cache-size = <0x8000>;
276 i-cache-size = <0xC000>;
288 reg = <0x701>;
290 d-cache-size = <0x8000>;
293 i-cache-size = <0xC000>;
304 cache-size = <0x100000>;
313 cache-size = <0x100000>;
322 cache-size = <0x100000>;
331 cache-size = <0x100000>;
340 cache-size = <0x100000>;
349 cache-size = <0x100000>;
358 cache-size = <0x100000>;
367 cache-size = <0x100000>;
376 arm,psci-suspend-param = <0x0>;
385 reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
386 <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
388 <0x0 0x0c0c0000 0 0x2000>, // GICC
389 <0x0 0x0c0d0000 0 0x1000>, // GICH
390 <0x0 0x0c0e0000 0 0x20000>; // GICV
401 reg = <0x0 0x6020000 0 0x20000>;
426 reg = <0x00000000 0x80000000 0 0x80000000>;
431 reg = <0x0 0x1080000 0x0 0x1000>;
438 reg = <0x0 0x1090000 0x0 0x1000>;
446 #clock-cells = <0>;
455 thermal-sensors = <&tmu 0>;
621 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
625 reg = <0x0 0x1ea0000 0x0 0x1e30>;
631 reg = <0x0 0x1eb0000 0x0 0x1e30>;
637 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
641 ranges = <0x0 0x00 0x8000000 0x100000>;
642 reg = <0x00 0x8000000 0x0 0x100000>;
648 compatible = "fsl,sec-v5.0-job-ring",
649 "fsl,sec-v4.0-job-ring";
650 reg = <0x10000 0x10000>;
655 compatible = "fsl,sec-v5.0-job-ring",
656 "fsl,sec-v4.0-job-ring";
657 reg = <0x20000 0x10000>;
662 compatible = "fsl,sec-v5.0-job-ring",
663 "fsl,sec-v4.0-job-ring";
664 reg = <0x30000 0x10000>;
669 compatible = "fsl,sec-v5.0-job-ring",
670 "fsl,sec-v4.0-job-ring";
671 reg = <0x40000 0x10000>;
678 reg = <0 0x1300000 0 0xa0000>;
685 reg = <0x0 0x1e00000 0x0 0x10000>;
691 reg = <0x0 0x1e80000 0x0 0x10000>;
699 reg = <0x0 0x1f70000 0x0 0x10000>;
703 ranges = <0x0 0x0 0x1f70000 0x10000>;
708 #address-cells = <0>;
710 reg = <0x14 4>;
712 <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
713 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
714 <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
715 <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
716 <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
717 <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
718 <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
719 <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
720 <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
721 <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
722 <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
723 <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
724 interrupt-map-mask = <0xf 0x0>;
730 reg = <0x0 0x1f80000 0x0 0x10000>;
732 fsl,tmu-range = <0x800000e6 0x8001017d>;
735 <0x00000000 0x00000035>,
737 <0x00000001 0x00000154>;
745 #size-cells = <0>;
746 reg = <0x0 0x2000000 0x0 0x10000>;
758 #size-cells = <0>;
759 reg = <0x0 0x2010000 0x0 0x10000>;
770 #size-cells = <0>;
771 reg = <0x0 0x2020000 0x0 0x10000>;
782 #size-cells = <0>;
783 reg = <0x0 0x2030000 0x0 0x10000>;
794 #size-cells = <0>;
795 reg = <0x0 0x2040000 0x0 0x10000>;
807 #size-cells = <0>;
808 reg = <0x0 0x2050000 0x0 0x10000>;
819 #size-cells = <0>;
820 reg = <0x0 0x2060000 0x0 0x10000>;
831 #size-cells = <0>;
832 reg = <0x0 0x2070000 0x0 0x10000>;
843 #size-cells = <0>;
844 reg = <0x0 0x20c0000 0x0 0x10000>,
845 <0x0 0x20000000 0x0 0x10000000>;
859 #size-cells = <0>;
860 reg = <0x0 0x2100000 0x0 0x10000>;
866 bus-num = <0>;
873 #size-cells = <0>;
874 reg = <0x0 0x2110000 0x0 0x10000>;
887 #size-cells = <0>;
888 reg = <0x0 0x2120000 0x0 0x10000>;
900 reg = <0x0 0x2140000 0x0 0x10000>;
901 interrupts = <0 28 0x4>; /* Level high type */
914 reg = <0x0 0x2150000 0x0 0x10000>;
915 interrupts = <0 63 0x4>; /* Level high type */
929 reg = <0x0 0x2180000 0x0 0x10000>;
933 <&clockgen QORIQ_CLK_SYSCLK 0>;
935 fsl,clk-source = /bits/ 8 <0>;
941 reg = <0x0 0x2190000 0x0 0x10000>;
945 <&clockgen QORIQ_CLK_SYSCLK 0>;
947 fsl,clk-source = /bits/ 8 <0>;
953 reg = <0x0 0x21c0000 0x0 0x1000>;
961 reg = <0x0 0x21d0000 0x0 0x1000>;
969 reg = <0x0 0x21e0000 0x0 0x1000>;
977 reg = <0x0 0x21f0000 0x0 0x1000>;
985 reg = <0x0 0x2300000 0x0 0x10000>;
996 reg = <0x0 0x2310000 0x0 0x10000>;
1007 reg = <0x0 0x2320000 0x0 0x10000>;
1018 reg = <0x0 0x2330000 0x0 0x10000>;
1029 reg = <0x0 0x23a0000 0 0x1000>,
1030 <0x0 0x2390000 0 0x1000>;
1037 reg = <0x0 0x1e34040 0x0 0x1c>;
1044 reg = <0x0 0x2800000 0x0 0x10000>;
1045 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1051 reg = <0x0 0x3100000 0x0 0x10000>;
1054 snps,quirk-frame-length-adjustment = <0x20>;
1063 reg = <0x0 0x3110000 0x0 0x10000>;
1066 snps,quirk-frame-length-adjustment = <0x20>;
1075 reg = <0x0 0x3200000 0x0 0x10000>,
1076 <0x7 0x100520 0x0 0x4>;
1087 reg = <0x0 0x3210000 0x0 0x10000>,
1088 <0x7 0x100520 0x0 0x4>;
1099 reg = <0x0 0x3220000 0x0 0x10000>,
1100 <0x7 0x100520 0x0 0x4>;
1111 reg = <0x0 0x3230000 0x0 0x10000>,
1112 <0x7 0x100520 0x0 0x4>;
1123 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
1124 <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
1136 bus-range = <0x0 0xff>;
1137 ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1140 interrupt-map-mask = <0 0 0 7>;
1141 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1142 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1143 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1144 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1145 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1151 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
1152 <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
1164 bus-range = <0x0 0xff>;
1165 ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1168 interrupt-map-mask = <0 0 0 7>;
1169 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1170 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1171 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1172 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1173 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1179 reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
1180 <0x90 0x00000000 0x0 0x00002000>; /* configuration space */
1192 bus-range = <0x0 0xff>;
1193 ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1196 interrupt-map-mask = <0 0 0 7>;
1197 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1198 <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1199 <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1200 <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1201 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1207 reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
1208 <0x98 0x00000000 0x0 0x00002000>; /* configuration space */
1220 bus-range = <0x0 0xff>;
1221 ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1224 interrupt-map-mask = <0 0 0 7>;
1225 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1226 <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1227 <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1228 <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1229 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1235 reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */
1236 <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
1248 bus-range = <0x0 0xff>;
1249 ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1252 interrupt-map-mask = <0 0 0 7>;
1253 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
1254 <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
1255 <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1256 <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
1257 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1263 reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */
1264 <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
1276 bus-range = <0x0 0xff>;
1277 ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1280 interrupt-map-mask = <0 0 0 7>;
1281 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1282 <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1283 <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1284 <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1285 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1291 reg = <0 0x5000000 0 0x800000>;
1302 // performance counter interrupts 0-9
1383 reg = <0x00000000 0x08340020 0 0x2>;
1388 reg = <0x0 0x8b95000 0x0 0x100>;
1395 /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
1398 reg = <0x0 0x8b96000 0x0 0x1000>;
1401 #size-cells = <0>;
1411 reg = <0x0 0x8b97000 0x0 0x1000>;
1415 #size-cells = <0>;
1424 reg = <0x0 0x8c07000 0x0 0x1000>;
1427 #size-cells = <0>;
1430 pcs1: ethernet-phy@0 {
1431 reg = <0>;
1437 reg = <0x0 0x8c0b000 0x0 0x1000>;
1440 #size-cells = <0>;
1443 pcs2: ethernet-phy@0 {
1444 reg = <0>;
1450 reg = <0x0 0x8c0f000 0x0 0x1000>;
1453 #size-cells = <0>;
1456 pcs3: ethernet-phy@0 {
1457 reg = <0>;
1463 reg = <0x0 0x8c13000 0x0 0x1000>;
1466 #size-cells = <0>;
1469 pcs4: ethernet-phy@0 {
1470 reg = <0>;
1476 reg = <0x0 0x8c17000 0x0 0x1000>;
1479 #size-cells = <0>;
1482 pcs5: ethernet-phy@0 {
1483 reg = <0>;
1489 reg = <0x0 0x8c1b000 0x0 0x1000>;
1492 #size-cells = <0>;
1495 pcs6: ethernet-phy@0 {
1496 reg = <0>;
1502 reg = <0x0 0x8c1f000 0x0 0x1000>;
1505 #size-cells = <0>;
1508 pcs7: ethernet-phy@0 {
1509 reg = <0>;
1515 reg = <0x0 0x8c23000 0x0 0x1000>;
1518 #size-cells = <0>;
1521 pcs8: ethernet-phy@0 {
1522 reg = <0>;
1528 reg = <0x0 0x8c27000 0x0 0x1000>;
1531 #size-cells = <0>;
1534 pcs9: ethernet-phy@0 {
1535 reg = <0>;
1541 reg = <0x0 0x8c2b000 0x0 0x1000>;
1544 #size-cells = <0>;
1547 pcs10: ethernet-phy@0 {
1548 reg = <0>;
1554 reg = <0x0 0x8c2f000 0x0 0x1000>;
1557 #size-cells = <0>;
1560 pcs11: ethernet-phy@0 {
1561 reg = <0>;
1567 reg = <0x0 0x8c33000 0x0 0x1000>;
1570 #size-cells = <0>;
1573 pcs12: ethernet-phy@0 {
1574 reg = <0>;
1580 reg = <0x0 0x8c37000 0x0 0x1000>;
1583 #size-cells = <0>;
1586 pcs13: ethernet-phy@0 {
1587 reg = <0>;
1593 reg = <0x0 0x8c3b000 0x0 0x1000>;
1596 #size-cells = <0>;
1599 pcs14: ethernet-phy@0 {
1600 reg = <0>;
1606 reg = <0x0 0x8c3f000 0x0 0x1000>;
1609 #size-cells = <0>;
1612 pcs15: ethernet-phy@0 {
1613 reg = <0>;
1619 reg = <0x0 0x8c43000 0x0 0x1000>;
1622 #size-cells = <0>;
1625 pcs16: ethernet-phy@0 {
1626 reg = <0>;
1632 reg = <0x0 0x8c47000 0x0 0x1000>;
1635 #size-cells = <0>;
1638 pcs17: ethernet-phy@0 {
1639 reg = <0>;
1645 reg = <0x0 0x8c4b000 0x0 0x1000>;
1648 #size-cells = <0>;
1651 pcs18: ethernet-phy@0 {
1652 reg = <0>;
1658 reg = <0x00000008 0x0c000000 0 0x40>,
1659 <0x00000000 0x08340000 0 0x40000>;
1662 iommu-map = <0 &smmu 0 0>;
1668 * Region type 0x0 - MC portals
1669 * Region type 0x1 - QBMAN portals
1671 ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
1672 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
1679 #size-cells = <0>;
1683 reg = <0x1>;
1689 reg = <0x2>;
1695 reg = <0x3>;
1701 reg = <0x4>;
1707 reg = <0x5>;
1713 reg = <0x6>;
1719 reg = <0x7>;
1725 reg = <0x8>;
1731 reg = <0x9>;
1737 reg = <0xa>;
1743 reg = <0xb>;
1749 reg = <0xc>;
1755 reg = <0xd>;
1761 reg = <0xe>;
1767 reg = <0xf>;
1773 reg = <0x10>;
1779 reg = <0x11>;
1785 reg = <0x12>;