Lines Matching +full:smc +full:- +full:wdt
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
33 #size-cells = <0>;
39 /* DRAM space - 1, size : 2 GB DRAM */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <100000000>;
46 clock-output-names = "sysclk";
49 gic: interrupt-controller@6000000 {
50 compatible = "arm,gic-v3";
56 #interrupt-cells = <3>;
57 #address-cells = <2>;
58 #size-cells = <2>;
60 interrupt-controller;
63 its: msi-controller@6020000 {
64 compatible = "arm,gic-v3-its";
65 msi-controller;
71 compatible = "fsl,ls2080a-rstcr", "syscon";
76 compatible = "syscon-reboot";
82 thermal-zones {
83 ddr-controller1 {
84 polling-delay-passive = <1000>;
85 polling-delay = <5000>;
86 thermal-sensors = <&tmu 1>;
89 ddr-ctrler1-crit {
97 ddr-controller2 {
98 polling-delay-passive = <1000>;
99 polling-delay = <5000>;
100 thermal-sensors = <&tmu 2>;
103 ddr-ctrler2-crit {
111 ddr-controller3 {
112 polling-delay-passive = <1000>;
113 polling-delay = <5000>;
114 thermal-sensors = <&tmu 3>;
117 ddr-ctrler3-crit {
125 core-cluster1 {
126 polling-delay-passive = <1000>;
127 polling-delay = <5000>;
128 thermal-sensors = <&tmu 4>;
131 core_cluster1_alert: core-cluster1-alert {
137 core-cluster1-crit {
144 cooling-maps {
147 cooling-device =
154 core-cluster2 {
155 polling-delay-passive = <1000>;
156 polling-delay = <5000>;
157 thermal-sensors = <&tmu 5>;
160 core_cluster2_alert: core-cluster2-alert {
166 core-cluster2-crit {
173 cooling-maps {
176 cooling-device =
183 core-cluster3 {
184 polling-delay-passive = <1000>;
185 polling-delay = <5000>;
186 thermal-sensors = <&tmu 6>;
189 core_cluster3_alert: core-cluster3-alert {
195 core-cluster3-crit {
202 cooling-maps {
205 cooling-device =
212 core-cluster4 {
213 polling-delay-passive = <1000>;
214 polling-delay = <5000>;
215 thermal-sensors = <&tmu 7>;
218 core_cluster4_alert: core-cluster4-alert {
224 core-cluster4-crit {
231 cooling-maps {
234 cooling-device =
243 compatible = "arm,armv8-timer";
244 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
245 <1 14 4>, /* Physical Non-Secure PPI, active-low */
246 <1 11 4>, /* Virtual PPI, active-low */
247 <1 10 4>; /* Hypervisor PPI, active-low */
251 compatible = "arm,armv8-pmuv3";
256 compatible = "arm,psci-0.2";
257 method = "smc";
261 compatible = "simple-bus";
262 #address-cells = <2>;
263 #size-cells = <2>;
265 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
268 compatible = "fsl,ls2080a-clockgen";
270 #clock-cells = <2>;
275 compatible = "fsl,ls2080a-dcfg", "syscon";
277 little-endian;
281 compatible = "fsl,ls1028a-sfp";
285 clock-names = "sfp";
289 compatible = "fsl,ls2080a-isc", "syscon";
291 little-endian;
292 #address-cells = <1>;
293 #size-cells = <1>;
296 extirq: interrupt-controller@14 {
297 compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
298 #interrupt-cells = <2>;
299 #address-cells = <0>;
300 interrupt-controller;
302 interrupt-map =
315 interrupt-map-mask = <0xf 0x0>;
320 compatible = "fsl,qoriq-tmu";
323 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
324 fsl,tmu-calibration =
361 little-endian;
362 #thermal-sensor-cells = <1>;
397 cluster1_core0_watchdog: wdt@c000000 {
404 clock-names = "wdog_clk", "apb_pclk";
407 cluster1_core1_watchdog: wdt@c010000 {
414 clock-names = "wdog_clk", "apb_pclk";
417 cluster2_core0_watchdog: wdt@c100000 {
424 clock-names = "wdog_clk", "apb_pclk";
427 cluster2_core1_watchdog: wdt@c110000 {
434 clock-names = "wdog_clk", "apb_pclk";
437 cluster3_core0_watchdog: wdt@c200000 {
444 clock-names = "wdog_clk", "apb_pclk";
447 cluster3_core1_watchdog: wdt@c210000 {
454 clock-names = "wdog_clk", "apb_pclk";
457 cluster4_core0_watchdog: wdt@c300000 {
464 clock-names = "wdog_clk", "apb_pclk";
467 cluster4_core1_watchdog: wdt@c310000 {
474 clock-names = "wdog_clk", "apb_pclk";
478 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
479 fsl,sec-era = <8>;
480 #address-cells = <1>;
481 #size-cells = <1>;
485 dma-coherent;
488 compatible = "fsl,sec-v5.0-job-ring",
489 "fsl,sec-v4.0-job-ring";
495 compatible = "fsl,sec-v5.0-job-ring",
496 "fsl,sec-v4.0-job-ring";
502 compatible = "fsl,sec-v5.0-job-ring",
503 "fsl,sec-v4.0-job-ring";
509 compatible = "fsl,sec-v5.0-job-ring",
510 "fsl,sec-v4.0-job-ring";
517 compatible = "fsl,dpaa2-console";
521 ptp-timer@8b95000 {
522 compatible = "fsl,dpaa2-ptp";
526 little-endian;
527 fsl,extts-fifo;
531 compatible = "fsl,fman-memac-mdio";
533 little-endian;
534 #address-cells = <1>;
535 #size-cells = <0>;
536 clock-frequency = <2500000>;
543 compatible = "fsl,fman-memac-mdio";
545 little-endian;
546 #address-cells = <1>;
547 #size-cells = <0>;
548 clock-frequency = <2500000>;
555 compatible = "fsl,fman-memac-mdio";
557 little-endian;
558 #address-cells = <1>;
559 #size-cells = <0>;
562 pcs1: ethernet-phy@0 {
568 compatible = "fsl,fman-memac-mdio";
570 little-endian;
571 #address-cells = <1>;
572 #size-cells = <0>;
575 pcs2: ethernet-phy@0 {
581 compatible = "fsl,fman-memac-mdio";
583 little-endian;
584 #address-cells = <1>;
585 #size-cells = <0>;
588 pcs3: ethernet-phy@0 {
594 compatible = "fsl,fman-memac-mdio";
596 little-endian;
597 #address-cells = <1>;
598 #size-cells = <0>;
601 pcs4: ethernet-phy@0 {
607 compatible = "fsl,fman-memac-mdio";
609 little-endian;
610 #address-cells = <1>;
611 #size-cells = <0>;
614 pcs5: ethernet-phy@0 {
620 compatible = "fsl,fman-memac-mdio";
622 little-endian;
623 #address-cells = <1>;
624 #size-cells = <0>;
627 pcs6: ethernet-phy@0 {
633 compatible = "fsl,fman-memac-mdio";
635 little-endian;
636 #address-cells = <1>;
637 #size-cells = <0>;
640 pcs7: ethernet-phy@0 {
646 compatible = "fsl,fman-memac-mdio";
648 little-endian;
649 #address-cells = <1>;
650 #size-cells = <0>;
653 pcs8: ethernet-phy@0 {
659 compatible = "fsl,fman-memac-mdio";
661 little-endian;
662 #address-cells = <1>;
663 #size-cells = <0>;
666 pcs9: ethernet-phy@0 {
672 compatible = "fsl,fman-memac-mdio";
674 little-endian;
675 #address-cells = <1>;
676 #size-cells = <0>;
679 pcs10: ethernet-phy@0 {
685 compatible = "fsl,fman-memac-mdio";
687 little-endian;
688 #address-cells = <1>;
689 #size-cells = <0>;
692 pcs11: ethernet-phy@0 {
698 compatible = "fsl,fman-memac-mdio";
700 little-endian;
701 #address-cells = <1>;
702 #size-cells = <0>;
705 pcs12: ethernet-phy@0 {
711 compatible = "fsl,fman-memac-mdio";
713 little-endian;
714 #address-cells = <1>;
715 #size-cells = <0>;
718 pcs13: ethernet-phy@0 {
724 compatible = "fsl,fman-memac-mdio";
726 little-endian;
727 #address-cells = <1>;
728 #size-cells = <0>;
731 pcs14: ethernet-phy@0 {
737 compatible = "fsl,fman-memac-mdio";
739 little-endian;
740 #address-cells = <1>;
741 #size-cells = <0>;
744 pcs15: ethernet-phy@0 {
750 compatible = "fsl,fman-memac-mdio";
752 little-endian;
753 #address-cells = <1>;
754 #size-cells = <0>;
757 pcs16: ethernet-phy@0 {
762 fsl_mc: fsl-mc@80c000000 {
763 compatible = "fsl,qoriq-mc";
766 msi-parent = <&its>;
767 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
768 dma-coherent;
769 #address-cells = <3>;
770 #size-cells = <1>;
773 * Region type 0x0 - MC portals
774 * Region type 0x1 - QBMAN portals
783 #address-cells = <1>;
784 #size-cells = <0>;
787 compatible = "fsl,qoriq-mc-dpmac";
789 pcs-handle = <&pcs1>;
793 compatible = "fsl,qoriq-mc-dpmac";
795 pcs-handle = <&pcs2>;
799 compatible = "fsl,qoriq-mc-dpmac";
801 pcs-handle = <&pcs3>;
805 compatible = "fsl,qoriq-mc-dpmac";
807 pcs-handle = <&pcs4>;
811 compatible = "fsl,qoriq-mc-dpmac";
813 pcs-handle = <&pcs5>;
817 compatible = "fsl,qoriq-mc-dpmac";
819 pcs-handle = <&pcs6>;
823 compatible = "fsl,qoriq-mc-dpmac";
825 pcs-handle = <&pcs7>;
829 compatible = "fsl,qoriq-mc-dpmac";
831 pcs-handle = <&pcs8>;
835 compatible = "fsl,qoriq-mc-dpmac";
837 pcs-handle = <&pcs9>;
841 compatible = "fsl,qoriq-mc-dpmac";
843 pcs-handle = <&pcs10>;
847 compatible = "fsl,qoriq-mc-dpmac";
849 pcs-handle = <&pcs11>;
853 compatible = "fsl,qoriq-mc-dpmac";
855 pcs-handle = <&pcs12>;
859 compatible = "fsl,qoriq-mc-dpmac";
861 pcs-handle = <&pcs13>;
865 compatible = "fsl,qoriq-mc-dpmac";
867 pcs-handle = <&pcs14>;
871 compatible = "fsl,qoriq-mc-dpmac";
873 pcs-handle = <&pcs15>;
877 compatible = "fsl,qoriq-mc-dpmac";
879 pcs-handle = <&pcs16>;
885 compatible = "arm,mmu-500";
887 #global-interrupts = <12>;
888 #iommu-cells = <1>;
889 stream-match-mask = <0x7C00>;
890 dma-coherent;
893 <0 15 4>, /* global non-secure fault */
894 <0 16 4>, /* combined non-secure interrupt */
895 /* performance counter interrupts 0-7 */
937 compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
938 #address-cells = <1>;
939 #size-cells = <0>;
944 clock-names = "dspi";
945 spi-num-chipselects = <5>;
950 compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
955 voltage-ranges = <1800 1800 3300 3300>;
956 sdhci,auto-cmd12;
957 little-endian;
958 bus-width = <4>;
962 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
965 gpio-controller;
966 little-endian;
967 #gpio-cells = <2>;
968 interrupt-controller;
969 #interrupt-cells = <2>;
973 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
976 gpio-controller;
977 little-endian;
978 #gpio-cells = <2>;
979 interrupt-controller;
980 #interrupt-cells = <2>;
984 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
987 gpio-controller;
988 little-endian;
989 #gpio-cells = <2>;
990 interrupt-controller;
991 #interrupt-cells = <2>;
995 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
998 gpio-controller;
999 little-endian;
1000 #gpio-cells = <2>;
1001 interrupt-controller;
1002 #interrupt-cells = <2>;
1007 compatible = "fsl,vf610-i2c";
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1012 clock-names = "i2c";
1019 compatible = "fsl,vf610-i2c";
1020 #address-cells = <1>;
1021 #size-cells = <0>;
1024 clock-names = "i2c";
1031 compatible = "fsl,vf610-i2c";
1032 #address-cells = <1>;
1033 #size-cells = <0>;
1036 clock-names = "i2c";
1043 compatible = "fsl,vf610-i2c";
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1048 clock-names = "i2c";
1053 ifc: memory-controller@2240000 {
1057 little-endian;
1058 #address-cells = <2>;
1059 #size-cells = <1>;
1067 compatible = "fsl,ls2080a-qspi";
1068 #address-cells = <1>;
1069 #size-cells = <0>;
1072 reg-names = "QuadSPI", "QuadSPI-memory";
1078 clock-names = "qspi_en", "qspi";
1083 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1084 reg-names = "regs", "config";
1086 interrupt-names = "intr";
1087 #address-cells = <3>;
1088 #size-cells = <2>;
1090 dma-coherent;
1091 num-viewport = <6>;
1092 bus-range = <0x0 0xff>;
1093 msi-parent = <&its>;
1094 #interrupt-cells = <1>;
1095 interrupt-map-mask = <0 0 0 7>;
1096 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
1100 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1105 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1106 reg-names = "regs", "config";
1108 interrupt-names = "intr";
1109 #address-cells = <3>;
1110 #size-cells = <2>;
1112 dma-coherent;
1113 num-viewport = <6>;
1114 bus-range = <0x0 0xff>;
1115 msi-parent = <&its>;
1116 #interrupt-cells = <1>;
1117 interrupt-map-mask = <0 0 0 7>;
1118 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
1122 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1127 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1128 reg-names = "regs", "config";
1130 interrupt-names = "intr";
1131 #address-cells = <3>;
1132 #size-cells = <2>;
1134 dma-coherent;
1135 num-viewport = <256>;
1136 bus-range = <0x0 0xff>;
1137 msi-parent = <&its>;
1138 #interrupt-cells = <1>;
1139 interrupt-map-mask = <0 0 0 7>;
1140 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
1144 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1149 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1150 reg-names = "regs", "config";
1152 interrupt-names = "intr";
1153 #address-cells = <3>;
1154 #size-cells = <2>;
1156 dma-coherent;
1157 num-viewport = <6>;
1158 bus-range = <0x0 0xff>;
1159 msi-parent = <&its>;
1160 #interrupt-cells = <1>;
1161 interrupt-map-mask = <0 0 0 7>;
1162 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
1166 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1172 compatible = "fsl,ls2080a-ahci";
1177 dma-coherent;
1182 compatible = "fsl,ls2080a-ahci";
1187 dma-coherent;
1191 #address-cells = <2>;
1192 #size-cells = <2>;
1193 compatible = "simple-bus";
1195 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
1202 snps,quirk-frame-length-adjustment = <0x20>;
1204 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1213 snps,quirk-frame-length-adjustment = <0x20>;
1215 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1221 compatible = "arm,ccn-504";
1226 rcpm: power-controller@1e34040 {
1227 compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
1229 #fsl,rcpm-wakeup-cells = <6>;
1230 little-endian;
1234 compatible = "fsl,ls208xa-ftm-alarm";
1236 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
1241 ddr1: memory-controller@1080000 {
1242 compatible = "fsl,qoriq-memory-controller";
1245 little-endian;
1248 ddr2: memory-controller@1090000 {
1249 compatible = "fsl,qoriq-memory-controller";
1252 little-endian;
1257 compatible = "linaro,optee-tz";
1258 method = "smc";