Lines Matching +full:ls1021a +full:- +full:dcfg
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 * We expect the enable-method for cpu's to be "psci", but this
43 * Currently supported enable-method is psci v0.2
47 compatible = "arm,cortex-a53";
50 next-level-cache = <&l2>;
51 cpu-idle-states = <&CPU_PH20>;
52 #cooling-cells = <2>;
57 compatible = "arm,cortex-a53";
60 next-level-cache = <&l2>;
61 cpu-idle-states = <&CPU_PH20>;
62 #cooling-cells = <2>;
67 compatible = "arm,cortex-a53";
70 next-level-cache = <&l2>;
71 cpu-idle-states = <&CPU_PH20>;
72 #cooling-cells = <2>;
77 compatible = "arm,cortex-a53";
80 next-level-cache = <&l2>;
81 cpu-idle-states = <&CPU_PH20>;
82 #cooling-cells = <2>;
85 l2: l2-cache {
87 cache-level = <2>;
88 cache-unified;
92 idle-states {
94 * PSCI node is not added default, U-boot will add missing
97 entry-method = "psci";
99 CPU_PH20: cpu-ph20 {
100 compatible = "arm,idle-state";
101 idle-state-name = "PH20";
102 arm,psci-suspend-param = <0x0>;
103 entry-latency-us = <1000>;
104 exit-latency-us = <1000>;
105 min-residency-us = <3000>;
115 reserved-memory {
116 #address-cells = <2>;
117 #size-cells = <2>;
120 bman_fbpr: bman-fbpr {
121 compatible = "shared-dma-pool";
124 no-map;
127 qman_fqd: qman-fqd {
128 compatible = "shared-dma-pool";
131 no-map;
134 qman_pfdr: qman-pfdr {
135 compatible = "shared-dma-pool";
138 no-map;
143 compatible = "fixed-clock";
144 #clock-cells = <0>;
145 clock-frequency = <100000000>;
146 clock-output-names = "sysclk";
150 compatible = "syscon-reboot";
151 regmap = <&dcfg>;
156 thermal-zones {
157 ddr-controller {
158 polling-delay-passive = <1000>;
159 polling-delay = <5000>;
160 thermal-sensors = <&tmu 0>;
163 ddr-ctrler-alert {
169 ddr-ctrler-crit {
178 polling-delay-passive = <1000>;
179 polling-delay = <5000>;
180 thermal-sensors = <&tmu 1>;
183 serdes-alert {
189 serdes-crit {
198 polling-delay-passive = <1000>;
199 polling-delay = <5000>;
200 thermal-sensors = <&tmu 2>;
203 fman-alert {
209 fman-crit {
217 core-cluster {
218 polling-delay-passive = <1000>;
219 polling-delay = <5000>;
220 thermal-sensors = <&tmu 3>;
223 core_cluster_alert: core-cluster-alert {
229 core_cluster_crit: core-cluster-crit {
236 cooling-maps {
239 cooling-device =
249 polling-delay-passive = <1000>;
250 polling-delay = <5000>;
251 thermal-sensors = <&tmu 4>;
254 sec-alert {
260 sec-crit {
270 compatible = "arm,armv8-timer";
272 <1 14 0xf08>, /* Physical Non-Secure PPI */
275 fsl,erratum-a008585;
279 compatible = "arm,armv8-pmuv3";
284 interrupt-affinity = <&cpu0>,
290 gic: interrupt-controller@1400000 {
291 compatible = "arm,gic-400";
292 #interrupt-cells = <3>;
293 interrupt-controller;
302 compatible = "simple-bus";
303 #address-cells = <2>;
304 #size-cells = <2>;
306 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
307 dma-coherent;
310 compatible = "fsl,ls1043a-clockgen";
312 #clock-cells = <2>;
317 compatible = "fsl,ls1043a-scfg", "syscon";
319 big-endian;
320 #address-cells = <1>;
321 #size-cells = <1>;
324 extirq: interrupt-controller@1ac {
325 compatible = "fsl,ls1043a-extirq";
326 #interrupt-cells = <2>;
327 #address-cells = <0>;
328 interrupt-controller;
330 interrupt-map =
343 interrupt-map-mask = <0xf 0x0>;
348 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
349 "fsl,sec-v4.0";
350 fsl,sec-era = <3>;
351 #address-cells = <1>;
352 #size-cells = <1>;
356 dma-coherent;
359 compatible = "fsl,sec-v5.4-job-ring",
360 "fsl,sec-v5.0-job-ring",
361 "fsl,sec-v4.0-job-ring";
367 compatible = "fsl,sec-v5.4-job-ring",
368 "fsl,sec-v5.0-job-ring",
369 "fsl,sec-v4.0-job-ring";
375 compatible = "fsl,sec-v5.4-job-ring",
376 "fsl,sec-v5.0-job-ring",
377 "fsl,sec-v4.0-job-ring";
383 compatible = "fsl,sec-v5.4-job-ring",
384 "fsl,sec-v5.0-job-ring",
385 "fsl,sec-v4.0-job-ring";
392 compatible = "fsl,ls1021a-sfp";
396 clock-names = "sfp";
399 dcfg: dcfg@1ee0000 {
400 compatible = "fsl,ls1043a-dcfg", "syscon";
402 big-endian;
405 ifc: memory-controller@1530000 {
412 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
413 #address-cells = <1>;
414 #size-cells = <0>;
417 reg-names = "QuadSPI", "QuadSPI-memory";
419 clock-names = "qspi_en", "qspi";
428 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
431 clock-frequency = <0>;
432 voltage-ranges = <1800 1800 3300 3300>;
433 sdhci,auto-cmd12;
434 big-endian;
435 bus-width = <4>;
438 ddr: memory-controller@1080000 {
439 compatible = "fsl,qoriq-memory-controller";
442 big-endian;
446 compatible = "fsl,qoriq-tmu";
449 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
450 fsl,tmu-calibration =
491 #thermal-sensor-cells = <1>;
498 memory-region = <&qman_fqd &qman_pfdr>;
505 memory-region = <&bman_fbpr>;
508 bportals: bman-portals@508000000 {
512 qportals: qman-portals@500000000 {
517 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
518 #address-cells = <1>;
519 #size-cells = <0>;
522 clock-names = "dspi";
525 spi-num-chipselects = <5>;
526 big-endian;
531 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
532 #address-cells = <1>;
533 #size-cells = <0>;
536 clock-names = "i2c";
541 dma-names = "rx", "tx";
546 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
547 #address-cells = <1>;
548 #size-cells = <0>;
551 clock-names = "i2c";
554 scl-gpios = <&gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
559 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
560 #address-cells = <1>;
561 #size-cells = <0>;
564 clock-names = "i2c";
567 scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
572 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
573 #address-cells = <1>;
574 #size-cells = <0>;
577 clock-names = "i2c";
580 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
617 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
620 gpio-controller;
621 #gpio-cells = <2>;
622 interrupt-controller;
623 #interrupt-cells = <2>;
627 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
630 gpio-controller;
631 #gpio-cells = <2>;
632 interrupt-controller;
633 #interrupt-cells = <2>;
637 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
640 gpio-controller;
641 #gpio-cells = <2>;
642 interrupt-controller;
643 #interrupt-cells = <2>;
647 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
650 gpio-controller;
651 #gpio-cells = <2>;
652 interrupt-controller;
653 #interrupt-cells = <2>;
657 #address-cells = <1>;
658 #size-cells = <1>;
659 compatible = "fsl,qe", "simple-bus";
662 brg-frequency = <100000000>;
663 bus-frequency = <200000000>;
664 fsl,qe-num-riscs = <1>;
665 fsl,qe-num-snums = <28>;
668 compatible = "fsl,qe-ic";
670 #address-cells = <0>;
671 interrupt-controller;
672 #interrupt-cells = <1>;
678 #address-cells = <1>;
679 #size-cells = <0>;
680 compatible = "fsl,ls1043-qe-si",
681 "fsl,t1040-qe-si";
686 #address-cells = <1>;
687 #size-cells = <1>;
688 compatible = "fsl,ls1043-qe-siram",
689 "fsl,t1040-qe-siram";
694 cell-index = <1>;
697 interrupt-parent = <&qeic>;
701 cell-index = <3>;
704 interrupt-parent = <&qeic>;
708 #address-cells = <1>;
709 #size-cells = <1>;
710 compatible = "fsl,qe-muram", "fsl,cpm-muram";
713 data-only@0 {
714 compatible = "fsl,qe-muram-data",
715 "fsl,cpm-muram-data";
722 compatible = "fsl,ls1021a-lpuart";
726 clock-names = "ipg";
731 compatible = "fsl,ls1021a-lpuart";
736 clock-names = "ipg";
741 compatible = "fsl,ls1021a-lpuart";
746 clock-names = "ipg";
751 compatible = "fsl,ls1021a-lpuart";
756 clock-names = "ipg";
761 compatible = "fsl,ls1021a-lpuart";
766 clock-names = "ipg";
771 compatible = "fsl,ls1021a-lpuart";
776 clock-names = "ipg";
781 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
786 clock-names = "wdog";
787 big-endian;
790 edma0: dma-controller@2c00000 {
791 #dma-cells = <2>;
792 compatible = "fsl,vf610-edma";
798 interrupt-names = "edma-tx", "edma-err";
799 dma-channels = <32>;
800 big-endian;
801 clock-names = "dmamux0", "dmamux1";
809 #address-cells = <2>;
810 #size-cells = <2>;
811 compatible = "simple-bus";
813 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
820 snps,quirk-frame-length-adjustment = <0x20>;
822 usb3-lpm-capable;
823 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
832 snps,quirk-frame-length-adjustment = <0x20>;
834 usb3-lpm-capable;
835 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
844 snps,quirk-frame-length-adjustment = <0x20>;
846 usb3-lpm-capable;
847 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
852 compatible = "fsl,ls1043a-ahci";
855 reg-names = "ahci", "sata-ecc";
859 dma-coherent;
863 msi1: msi-controller1@1571000 {
864 compatible = "fsl,ls1043a-msi";
866 msi-controller;
870 msi2: msi-controller2@1572000 {
871 compatible = "fsl,ls1043a-msi";
873 msi-controller;
877 msi3: msi-controller3@1573000 {
878 compatible = "fsl,ls1043a-msi";
880 msi-controller;
885 compatible = "fsl,ls1043a-pcie";
888 reg-names = "regs", "config";
891 interrupt-names = "pme", "aer";
892 #address-cells = <3>;
893 #size-cells = <2>;
895 num-viewport = <6>;
896 bus-range = <0x0 0xff>;
898 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
899 msi-parent = <&msi1>, <&msi2>, <&msi3>;
900 #interrupt-cells = <1>;
901 interrupt-map-mask = <0 0 0 7>;
902 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
906 fsl,pcie-scfg = <&scfg 0>;
907 big-endian;
912 compatible = "fsl,ls1043a-pcie";
915 reg-names = "regs", "config";
918 interrupt-names = "pme", "aer";
919 #address-cells = <3>;
920 #size-cells = <2>;
922 num-viewport = <6>;
923 bus-range = <0x0 0xff>;
925 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
926 msi-parent = <&msi1>, <&msi2>, <&msi3>;
927 #interrupt-cells = <1>;
928 interrupt-map-mask = <0 0 0 7>;
929 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
933 fsl,pcie-scfg = <&scfg 1>;
934 big-endian;
939 compatible = "fsl,ls1043a-pcie";
942 reg-names = "regs", "config";
945 interrupt-names = "pme", "aer";
946 #address-cells = <3>;
947 #size-cells = <2>;
949 num-viewport = <6>;
950 bus-range = <0x0 0xff>;
952 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
953 msi-parent = <&msi1>, <&msi2>, <&msi3>;
954 #interrupt-cells = <1>;
955 interrupt-map-mask = <0 0 0 7>;
956 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
960 fsl,pcie-scfg = <&scfg 2>;
961 big-endian;
965 qdma: dma-controller@8380000 {
966 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
975 interrupt-names = "qdma-error", "qdma-queue0",
976 "qdma-queue1", "qdma-queue2", "qdma-queue3";
977 dma-channels = <8>;
978 block-number = <1>;
979 block-offset = <0x10000>;
980 fsl,dma-queues = <2>;
981 status-sizes = <64>;
982 queue-sizes = <64 64>;
983 big-endian;
986 rcpm: power-controller@1ee2140 {
987 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
989 #fsl,rcpm-wakeup-cells = <1>;
993 compatible = "fsl,ls1043a-ftm-alarm";
995 fsl,rcpm-wakeup = <&rcpm 0x20000>;
997 big-endian;
1003 compatible = "linaro,optee-tz";
1010 #include "qoriq-qman-portals.dtsi"
1011 #include "qoriq-bman-portals.dtsi"