Lines Matching +full:armv8 +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0
9 * Exynos850 based board files can include this file and provide
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a55-pmu";
44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
49 oscclk: clock-oscclk {
50 compatible = "fixed-clock";
51 clock-output-names = "oscclk";
52 #clock-cells = <0>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 cpu-map {
93 compatible = "arm,cortex-a55";
95 enable-method = "psci";
99 compatible = "arm,cortex-a55";
101 enable-method = "psci";
105 compatible = "arm,cortex-a55";
107 enable-method = "psci";
111 compatible = "arm,cortex-a55";
113 enable-method = "psci";
117 compatible = "arm,cortex-a55";
119 enable-method = "psci";
123 compatible = "arm,cortex-a55";
125 enable-method = "psci";
129 compatible = "arm,cortex-a55";
131 enable-method = "psci";
135 compatible = "arm,cortex-a55";
137 enable-method = "psci";
142 compatible = "arm,psci-1.0";
147 compatible = "arm,armv8-timer";
157 compatible = "simple-bus";
158 #address-cells = <1>;
159 #size-cells = <1>;
163 compatible = "samsung,exynos850-chipid";
168 compatible = "samsung,exynos850-mct",
169 "samsung,exynos4210-mct";
184 clock-names = "fin_pll", "mct";
187 gic: interrupt-controller@12a01000 {
188 compatible = "arm,gic-400";
189 #interrupt-cells = <3>;
190 #address-cells = <0>;
195 interrupt-controller;
200 pmu_system_controller: system-controller@11860000 {
201 compatible = "samsung,exynos850-pmu", "syscon";
204 reboot: syscon-reboot {
205 compatible = "syscon-reboot";
214 compatible = "samsung,exynos850-wdt";
218 clock-names = "watchdog", "watchdog_src";
219 samsung,syscon-phandle = <&pmu_system_controller>;
220 samsung,cluster-index = <0>;
225 compatible = "samsung,exynos850-wdt";
229 clock-names = "watchdog", "watchdog_src";
230 samsung,syscon-phandle = <&pmu_system_controller>;
231 samsung,cluster-index = <1>;
235 cmu_peri: clock-controller@10030000 {
236 compatible = "samsung,exynos850-cmu-peri";
238 #clock-cells = <1>;
243 clock-names = "oscclk", "dout_peri_bus",
247 cmu_g3d: clock-controller@11400000 {
248 compatible = "samsung,exynos850-cmu-g3d";
250 #clock-cells = <1>;
253 clock-names = "oscclk", "dout_g3d_switch";
256 cmu_apm: clock-controller@11800000 {
257 compatible = "samsung,exynos850-cmu-apm";
259 #clock-cells = <1>;
262 clock-names = "oscclk", "dout_clkcmu_apm_bus";
265 cmu_cmgp: clock-controller@11c00000 {
266 compatible = "samsung,exynos850-cmu-cmgp";
268 #clock-cells = <1>;
271 clock-names = "oscclk", "gout_clkcmu_cmgp_bus";
274 cmu_core: clock-controller@12000000 {
275 compatible = "samsung,exynos850-cmu-core";
277 #clock-cells = <1>;
283 clock-names = "oscclk", "dout_core_bus",
288 cmu_top: clock-controller@120e0000 {
289 compatible = "samsung,exynos850-cmu-top";
291 #clock-cells = <1>;
294 clock-names = "oscclk";
297 cmu_mfcmscl: clock-controller@12c00000 {
298 compatible = "samsung,exynos850-cmu-mfcmscl";
300 #clock-cells = <1>;
307 clock-names = "oscclk", "dout_mfcmscl_mfc",
312 cmu_dpu: clock-controller@13000000 {
313 compatible = "samsung,exynos850-cmu-dpu";
315 #clock-cells = <1>;
318 clock-names = "oscclk", "dout_dpu";
321 cmu_hsi: clock-controller@13400000 {
322 compatible = "samsung,exynos850-cmu-hsi";
324 #clock-cells = <1>;
330 clock-names = "oscclk", "dout_hsi_bus",
334 cmu_is: clock-controller@14500000 {
335 compatible = "samsung,exynos850-cmu-is";
337 #clock-cells = <1>;
344 clock-names = "oscclk", "dout_is_bus", "dout_is_itp",
348 cmu_aud: clock-controller@14a00000 {
349 compatible = "samsung,exynos850-cmu-aud";
351 #clock-cells = <1>;
354 clock-names = "oscclk", "dout_aud";
358 compatible = "samsung,exynos850-pinctrl";
361 wakeup-interrupt-controller {
362 compatible = "samsung,exynos850-wakeup-eint",
363 "samsung,exynos7-wakeup-eint";
368 compatible = "samsung,exynos850-pinctrl";
371 wakeup-interrupt-controller {
372 compatible = "samsung,exynos850-wakeup-eint",
373 "samsung,exynos7-wakeup-eint";
378 compatible = "samsung,exynos850-pinctrl";
384 compatible = "samsung,exynos850-pinctrl";
390 compatible = "samsung,exynos850-pinctrl";
396 compatible = "samsung,exynos850-pinctrl";
401 compatible = "samsung,exynos850-rtc", "samsung,s3c6410-rtc";
406 clock-names = "rtc";
411 compatible = "samsung,exynos850-dw-mshc-smu",
412 "samsung,exynos7-dw-mshc-smu";
415 #address-cells = <1>;
416 #size-cells = <0>;
419 clock-names = "biu", "ciu";
420 fifo-depth = <0x40>;
425 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
428 #address-cells = <1>;
429 #size-cells = <0>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&i2c0_pins>;
433 clock-names = "i2c";
438 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
441 #address-cells = <1>;
442 #size-cells = <0>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&i2c1_pins>;
446 clock-names = "i2c";
451 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
454 #address-cells = <1>;
455 #size-cells = <0>;
456 pinctrl-names = "default";
457 pinctrl-0 = <&i2c2_pins>;
459 clock-names = "i2c";
464 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&i2c3_pins>;
472 clock-names = "i2c";
477 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
480 #address-cells = <1>;
481 #size-cells = <0>;
482 pinctrl-names = "default";
483 pinctrl-0 = <&i2c4_pins>;
485 clock-names = "i2c";
491 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
494 #address-cells = <1>;
495 #size-cells = <0>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&i2c5_pins>;
499 clock-names = "i2c";
505 compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
508 #address-cells = <1>;
509 #size-cells = <0>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&i2c6_pins>;
513 clock-names = "i2c";
518 compatible = "samsung,exynos-sysmmu";
521 clock-names = "sysmmu";
523 #iommu-cells = <0>;
527 compatible = "samsung,exynos-sysmmu";
530 clock-names = "sysmmu";
532 #iommu-cells = <0>;
536 compatible = "samsung,exynos-sysmmu";
539 clock-names = "sysmmu";
541 #iommu-cells = <0>;
545 compatible = "samsung,exynos-sysmmu";
548 clock-names = "sysmmu";
550 #iommu-cells = <0>;
554 compatible = "samsung,exynos-sysmmu";
557 clock-names = "sysmmu";
559 #iommu-cells = <0>;
563 compatible = "samsung,exynos850-peri-sysreg",
564 "samsung,exynos850-sysreg", "syscon";
570 compatible = "samsung,exynos850-cmgp-sysreg",
571 "samsung,exynos850-sysreg", "syscon";
577 compatible = "samsung,exynos850-dwusb3";
581 clock-names = "bus_early", "ref";
582 #address-cells = <1>;
583 #size-cells = <1>;
591 phy-names = "usb2-phy";
596 compatible = "samsung,exynos850-usbdrd-phy";
600 clock-names = "phy", "ref";
601 samsung,pmu-syscon = <&pmu_system_controller>;
602 #phy-cells = <1>;
607 compatible = "samsung,exynos850-usi";
611 #address-cells = <1>;
612 #size-cells = <1>;
616 clock-names = "pclk", "ipclk";
620 compatible = "samsung,exynos850-uart";
623 pinctrl-names = "default";
624 pinctrl-0 = <&uart0_pins>;
627 clock-names = "uart", "clk_uart_baud0";
633 compatible = "samsung,exynos850-usi";
637 #address-cells = <1>;
638 #size-cells = <1>;
642 clock-names = "pclk", "ipclk";
646 compatible = "samsung,exynos850-hsi2c",
647 "samsung,exynosautov9-hsi2c";
650 #address-cells = <1>;
651 #size-cells = <0>;
652 pinctrl-names = "default";
653 pinctrl-0 = <&hsi2c0_pins>;
656 clock-names = "hsi2c", "hsi2c_pclk";
662 compatible = "samsung,exynos850-usi";
666 #address-cells = <1>;
667 #size-cells = <1>;
671 clock-names = "pclk", "ipclk";
675 compatible = "samsung,exynos850-hsi2c",
676 "samsung,exynosautov9-hsi2c";
679 #address-cells = <1>;
680 #size-cells = <0>;
681 pinctrl-names = "default";
682 pinctrl-0 = <&hsi2c1_pins>;
685 clock-names = "hsi2c", "hsi2c_pclk";
691 compatible = "samsung,exynos850-usi";
695 #address-cells = <1>;
696 #size-cells = <1>;
700 clock-names = "pclk", "ipclk";
704 compatible = "samsung,exynos850-hsi2c",
705 "samsung,exynosautov9-hsi2c";
708 #address-cells = <1>;
709 #size-cells = <0>;
710 pinctrl-names = "default";
711 pinctrl-0 = <&hsi2c2_pins>;
714 clock-names = "hsi2c", "hsi2c_pclk";
720 compatible = "samsung,exynos850-usi";
724 #address-cells = <1>;
725 #size-cells = <1>;
729 clock-names = "pclk", "ipclk";
734 compatible = "samsung,exynos850-usi";
738 #address-cells = <1>;
739 #size-cells = <1>;
743 clock-names = "pclk", "ipclk";
747 compatible = "samsung,exynos850-hsi2c",
748 "samsung,exynosautov9-hsi2c";
751 #address-cells = <1>;
752 #size-cells = <0>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&hsi2c3_pins>;
757 clock-names = "hsi2c", "hsi2c_pclk";
762 compatible = "samsung,exynos850-uart";
765 pinctrl-names = "default";
766 pinctrl-0 = <&uart1_single_pins>;
769 clock-names = "uart", "clk_uart_baud0";
775 compatible = "samsung,exynos850-usi";
779 #address-cells = <1>;
780 #size-cells = <1>;
784 clock-names = "pclk", "ipclk";
788 compatible = "samsung,exynos850-hsi2c",
789 "samsung,exynosautov9-hsi2c";
792 #address-cells = <1>;
793 #size-cells = <0>;
794 pinctrl-names = "default";
795 pinctrl-0 = <&hsi2c4_pins>;
798 clock-names = "hsi2c", "hsi2c_pclk";
803 compatible = "samsung,exynos850-uart";
806 pinctrl-names = "default";
807 pinctrl-0 = <&uart2_single_pins>;
810 clock-names = "uart", "clk_uart_baud0";
817 #include "exynos850-pinctrl.dtsi"