Lines Matching +full:0 +full:x11c30000
52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
100 reg = <0x1>;
106 reg = <0x2>;
112 reg = <0x3>;
118 reg = <0x100>;
124 reg = <0x101>;
130 reg = <0x102>;
136 reg = <0x103>;
156 soc: soc@0 {
160 ranges = <0x0 0x0 0x0 0x20000000>;
164 reg = <0x10000000 0x100>;
170 reg = <0x10040000 0x800>;
190 #address-cells = <0>;
191 reg = <0x12a01000 0x1000>,
192 <0x12a02000 0x2000>,
193 <0x12a04000 0x2000>,
194 <0x12a06000 0x2000>;
202 reg = <0x11860000 0x10000>;
207 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
208 mask = <0x2>; /* SWRESET_SYSTEM */
209 value = <0x2>; /* reset value */
215 reg = <0x10050000 0x100>;
220 samsung,cluster-index = <0>;
226 reg = <0x10060000 0x100>;
237 reg = <0x10030000 0x8000>;
249 reg = <0x11400000 0x8000>;
258 reg = <0x11800000 0x8000>;
267 reg = <0x11c00000 0x8000>;
276 reg = <0x12000000 0x8000>;
290 reg = <0x120e0000 0x8000>;
299 reg = <0x12c00000 0x8000>;
314 reg = <0x13000000 0x8000>;
323 reg = <0x13400000 0x8000>;
336 reg = <0x14500000 0x8000>;
350 reg = <0x14a00000 0x8000>;
359 reg = <0x11850000 0x1000>;
369 reg = <0x11c30000 0x1000>;
379 reg = <0x12070000 0x1000>;
385 reg = <0x13430000 0x1000>;
391 reg = <0x139b0000 0x1000>;
397 reg = <0x14a60000 0x1000>;
402 reg = <0x11a30000 0x100>;
413 reg = <0x12100000 0x2000>;
416 #size-cells = <0>;
420 fifo-depth = <0x40>;
426 reg = <0x13830000 0x100>;
429 #size-cells = <0>;
431 pinctrl-0 = <&i2c0_pins>;
439 reg = <0x13840000 0x100>;
442 #size-cells = <0>;
444 pinctrl-0 = <&i2c1_pins>;
452 reg = <0x13850000 0x100>;
455 #size-cells = <0>;
457 pinctrl-0 = <&i2c2_pins>;
465 reg = <0x13860000 0x100>;
468 #size-cells = <0>;
470 pinctrl-0 = <&i2c3_pins>;
478 reg = <0x13870000 0x100>;
481 #size-cells = <0>;
483 pinctrl-0 = <&i2c4_pins>;
492 reg = <0x13880000 0x100>;
495 #size-cells = <0>;
497 pinctrl-0 = <&i2c5_pins>;
506 reg = <0x13890000 0x100>;
509 #size-cells = <0>;
511 pinctrl-0 = <&i2c6_pins>;
519 reg = <0x12c50000 0x9000>;
523 #iommu-cells = <0>;
528 reg = <0x130c0000 0x9000>;
532 #iommu-cells = <0>;
537 reg = <0x14550000 0x9000>;
541 #iommu-cells = <0>;
546 reg = <0x14570000 0x9000>;
550 #iommu-cells = <0>;
555 reg = <0x14850000 0x9000>;
559 #iommu-cells = <0>;
565 reg = <0x10020000 0x10000>;
572 reg = <0x11c20000 0x10000>;
578 ranges = <0x0 0x13600000 0x10000>;
586 usbdrd_dwc3: usb@0 {
588 reg = <0x0 0x10000>;
590 phys = <&usbdrd_phy 0>;
597 reg = <0x135d0000 0x100>;
608 reg = <0x138200c0 0x20>;
609 samsung,sysreg = <&sysreg_peri 0x1010>;
621 reg = <0x13820000 0xc0>;
624 pinctrl-0 = <&uart0_pins>;
634 reg = <0x138a00c0 0x20>;
635 samsung,sysreg = <&sysreg_peri 0x1020>;
648 reg = <0x138a0000 0xc0>;
651 #size-cells = <0>;
653 pinctrl-0 = <&hsi2c0_pins>;
663 reg = <0x138b00c0 0x20>;
664 samsung,sysreg = <&sysreg_peri 0x1030>;
677 reg = <0x138b0000 0xc0>;
680 #size-cells = <0>;
682 pinctrl-0 = <&hsi2c1_pins>;
692 reg = <0x138c00c0 0x20>;
693 samsung,sysreg = <&sysreg_peri 0x1040>;
706 reg = <0x138c0000 0xc0>;
709 #size-cells = <0>;
711 pinctrl-0 = <&hsi2c2_pins>;
721 reg = <0x139400c0 0x20>;
722 samsung,sysreg = <&sysreg_peri 0x1050>;
735 reg = <0x11d000c0 0x20>;
736 samsung,sysreg = <&sysreg_cmgp 0x2000>;
749 reg = <0x11d00000 0xc0>;
752 #size-cells = <0>;
754 pinctrl-0 = <&hsi2c3_pins>;
763 reg = <0x11d00000 0xc0>;
766 pinctrl-0 = <&uart1_single_pins>;
776 reg = <0x11d200c0 0x20>;
777 samsung,sysreg = <&sysreg_cmgp 0x2010>;
790 reg = <0x11d20000 0xc0>;
793 #size-cells = <0>;
795 pinctrl-0 = <&hsi2c4_pins>;
804 reg = <0x11d20000 0xc0>;
807 pinctrl-0 = <&uart2_single_pins>;