Lines Matching refs:cache
47 /* Source for L1 d/i cache-line-size, cache-sets, cache-size
49 * Source for L2 cache-line-size and cache-sets:
51 * and for cache-size:
59 d-cache-size = <0x10000>;
60 d-cache-line-size = <64>;
61 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
62 i-cache-size = <0x10000>;
63 i-cache-line-size = <64>;
64 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
65 next-level-cache = <&l2_cache_l0>;
67 l2_cache_l0: l2-cache-l0 {
68 compatible = "cache";
69 cache-size = <0x80000>;
70 cache-line-size = <128>;
71 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
72 cache-level = <2>;
73 cache-unified;
74 next-level-cache = <&l3_cache>;
83 d-cache-size = <0x10000>;
84 d-cache-line-size = <64>;
85 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
86 i-cache-size = <0x10000>;
87 i-cache-line-size = <64>;
88 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
89 next-level-cache = <&l2_cache_l1>;
91 l2_cache_l1: l2-cache-l1 {
92 compatible = "cache";
93 cache-size = <0x80000>;
94 cache-line-size = <128>;
95 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
96 cache-level = <2>;
97 cache-unified;
98 next-level-cache = <&l3_cache>;
107 d-cache-size = <0x10000>;
108 d-cache-line-size = <64>;
109 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
110 i-cache-size = <0x10000>;
111 i-cache-line-size = <64>;
112 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
113 next-level-cache = <&l2_cache_l2>;
115 l2_cache_l2: l2-cache-l2 {
116 compatible = "cache";
117 cache-size = <0x80000>;
118 cache-line-size = <128>;
119 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
120 cache-level = <2>;
121 cache-unified;
122 next-level-cache = <&l3_cache>;
131 d-cache-size = <0x10000>;
132 d-cache-line-size = <64>;
133 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
134 i-cache-size = <0x10000>;
135 i-cache-line-size = <64>;
136 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
137 next-level-cache = <&l2_cache_l3>;
139 l2_cache_l3: l2-cache-l3 {
140 compatible = "cache";
141 cache-size = <0x80000>;
142 cache-line-size = <128>;
143 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
144 cache-level = <2>;
145 cache-unified;
146 next-level-cache = <&l3_cache>;
150 /* Source for cache-line-size and cache-sets:
151 * https://developer.arm.com/documentation/100453/0401/L3-cache?lang=en
152 * Source for cache-size:
155 l3_cache: l3-cache {
156 compatible = "cache";
157 cache-size = <0x200000>;
158 cache-line-size = <64>;
159 cache-sets = <2048>; // 2MiB(size)/64(line-size)=32768ways/16-way set
160 cache-level = <3>;
161 cache-unified;