Lines Matching +full:fpga +full:- +full:region
1 // SPDX-License-Identifier: GPL-2.0
6 * V2M-P1
8 * HBI-0190D
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
14 * original variant (vexpress-v2m.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 v2m_fixed_3v3: fixed-regulator-0 {
24 compatible = "regulator-fixed";
25 regulator-name = "3V3";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
28 regulator-always-on;
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <24000000>;
35 clock-output-names = "v2m:clk24mhz";
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <1000000>;
42 clock-output-names = "v2m:refclk1mhz";
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <32768>;
49 clock-output-names = "v2m:refclk32khz";
53 compatible = "gpio-leds";
55 led-1 {
58 linux,default-trigger = "heartbeat";
61 led-2 {
64 linux,default-trigger = "disk-activity";
67 led-3 {
70 linux,default-trigger = "cpu0";
73 led-4 {
76 linux,default-trigger = "cpu1";
79 led-5 {
82 linux,default-trigger = "cpu2";
85 led-6 {
88 linux,default-trigger = "cpu3";
91 led-7 {
94 linux,default-trigger = "cpu4";
97 led-8 {
100 linux,default-trigger = "cpu5";
105 compatible = "simple-bus";
106 #address-cells = <1>;
107 #size-cells = <1>;
109 #interrupt-cells = <1>;
110 interrupt-map-mask = <0 63>;
111 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
155 motherboard-bus@8000000 {
158 compatible = "arm,vexpress,v2m-p1", "simple-bus";
159 #address-cells = <2>; /* SMB chipselect number and offset */
160 #size-cells = <1>;
169 compatible = "arm,vexpress-flash", "cfi-flash";
172 bank-width = <4>;
174 compatible = "arm,arm-firmware-suite";
179 compatible = "arm,vexpress-psram", "mtd-ram";
181 bank-width = <4>;
188 phy-mode = "mii";
189 reg-io-width = <4>;
190 smsc,irq-active-high;
191 smsc,irq-push-pull;
192 vdd33a-supply = <&v2m_fixed_3v3>;
193 vddvario-supply = <&v2m_fixed_3v3>;
197 compatible = "nxp,usb-isp1761";
203 iofpga-bus@300000000 {
204 compatible = "simple-bus";
205 #address-cells = <1>;
206 #size-cells = <1>;
210 compatible = "arm,vexpress-sysreg";
212 #address-cells = <1>;
213 #size-cells = <1>;
217 compatible = "arm,vexpress-sysreg,sys_led";
219 gpio-controller;
220 #gpio-cells = <2>;
224 compatible = "arm,vexpress-sysreg,sys_mci";
226 gpio-controller;
227 #gpio-cells = <2>;
231 compatible = "arm,vexpress-sysreg,sys_flash";
233 gpio-controller;
234 #gpio-cells = <2>;
242 clock-names = "refclk", "timclk", "apb_pclk";
243 #clock-cells = <1>;
244 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
245 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
246 …assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz…
249 /* PCI-E I2C bus */
251 compatible = "arm,versatile-i2c";
254 #address-cells = <1>;
255 #size-cells = <0>;
257 pcie-switch@60 {
268 clock-names = "apb_pclk";
275 cd-gpios = <&v2m_mmc_gpios 0 0>;
276 wp-gpios = <&v2m_mmc_gpios 1 0>;
277 max-frequency = <12000000>;
278 vmmc-supply = <&v2m_fixed_3v3>;
280 clock-names = "mclk", "apb_pclk";
288 clock-names = "KMIREFCLK", "apb_pclk";
296 clock-names = "KMIREFCLK", "apb_pclk";
304 clock-names = "uartclk", "apb_pclk";
312 clock-names = "uartclk", "apb_pclk";
320 clock-names = "uartclk", "apb_pclk";
328 clock-names = "uartclk", "apb_pclk";
336 clock-names = "wdog_clk", "apb_pclk";
344 clock-names = "timclken1", "timclken2", "apb_pclk";
352 clock-names = "timclken1", "timclken2", "apb_pclk";
357 compatible = "arm,versatile-i2c";
359 #address-cells = <1>;
360 #size-cells = <0>;
362 dvi-transmitter@39 {
363 compatible = "sil,sii9022-tpi", "sil,sii9022";
367 #address-cells = <1>;
368 #size-cells = <0>;
373 remote-endpoint = <&clcd_pads>;
379 dvi-transmitter@60 {
380 compatible = "sil,sii9022-cpi", "sil,sii9022";
390 clock-names = "apb_pclk";
393 compact-flash@1a0000 {
394 compatible = "arm,vexpress-cf", "ata-generic";
397 reg-shift = <2>;
403 interrupt-names = "combined";
406 clock-names = "clcdclk", "apb_pclk";
408 max-memory-bandwidth = <54000000>;
409 memory-region = <&vram>;
413 remote-endpoint = <&dvi_bridge_in>;
414 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
420 compatible = "arm,vexpress,config-bus";
421 arm,vexpress,config-bridge = <&v2m_sysreg>;
425 compatible = "arm,vexpress-osc";
426 arm,vexpress-sysreg,func = <1 0>;
427 freq-range = <25000000 60000000>;
428 #clock-cells = <0>;
429 clock-output-names = "v2m:oscclk0";
434 compatible = "arm,vexpress-osc";
435 arm,vexpress-sysreg,func = <1 1>;
436 freq-range = <23750000 65000000>;
437 #clock-cells = <0>;
438 clock-output-names = "v2m:oscclk1";
442 /* IO FPGA peripheral clock */
443 compatible = "arm,vexpress-osc";
444 arm,vexpress-sysreg,func = <1 2>;
445 freq-range = <24000000 24000000>;
446 #clock-cells = <0>;
447 clock-output-names = "v2m:oscclk2";
450 volt-vio {
452 compatible = "arm,vexpress-volt";
453 arm,vexpress-sysreg,func = <2 0>;
454 regulator-name = "VIO";
455 regulator-always-on;
459 temp-mcc {
461 compatible = "arm,vexpress-temp";
462 arm,vexpress-sysreg,func = <4 0>;
467 compatible = "arm,vexpress-reset";
468 arm,vexpress-sysreg,func = <5 0>;
472 compatible = "arm,vexpress-muxfpga";
473 arm,vexpress-sysreg,func = <7 0>;
477 compatible = "arm,vexpress-shutdown";
478 arm,vexpress-sysreg,func = <8 0>;
482 compatible = "arm,vexpress-reboot";
483 arm,vexpress-sysreg,func = <9 0>;
487 compatible = "arm,vexpress-dvimode";
488 arm,vexpress-sysreg,func = <11 0>;