Lines Matching +full:gxbb +full:- +full:clkc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
26 clock-names = "usb_ctrl", "ddr";
32 phy-names = "usb2-phy0", "usb2-phy1";
35 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
38 clocks = <&clkc CLKID_USB1>;
39 clock-names = "otg";
42 g-rx-fifo-size = <192>;
43 g-np-tx-fifo-size = <128>;
44 g-tx-fifo-size = <128 128 16 16 16>;
52 maximum-speed = "high-speed";
57 acodec: audio-controller@c8832000 {
60 #sound-dai-cells = <0>;
61 sound-name-prefix = "ACODEC";
62 clocks = <&clkc CLKID_ACODEC>;
63 clock-names = "pclk";
69 compatible = "amlogic,gxl-crypto";
73 clocks = <&clkc CLKID_BLKMV>;
74 clock-names = "blkmv";
81 compatible = "amlogic,aiu-gxl", "amlogic,aiu";
82 clocks = <&clkc CLKID_AIU_GLUE>,
83 <&clkc CLKID_I2S_OUT>,
84 <&clkc CLKID_AOCLK_GATE>,
85 <&clkc CLKID_CTS_AMCLK>,
86 <&clkc CLKID_MIXER_IFACE>,
87 <&clkc CLKID_IEC958>,
88 <&clkc CLKID_IEC958_GATE>,
89 <&clkc CLKID_CTS_MCLK_I958>,
90 <&clkc CLKID_CTS_I958>;
91 clock-names = "pclk",
105 compatible = "amlogic,meson-gxl-usb2-phy";
106 #phy-cells = <0>;
108 clocks = <&clkc CLKID_USB>;
109 clock-names = "phy";
111 reset-names = "phy";
116 compatible = "amlogic,meson-gxl-usb2-phy";
117 #phy-cells = <0>;
119 clocks = <&clkc CLKID_USB>;
120 clock-names = "phy";
122 reset-names = "phy";
128 clocks = <&clkc CLKID_EFUSE>;
132 clocks = <&clkc CLKID_ETH>,
133 <&clkc CLKID_FCLK_DIV2>,
134 <&clkc CLKID_MPLL2>,
135 <&clkc CLKID_FCLK_DIV2>;
136 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "snps,dwmac-mdio";
147 compatible = "amlogic,meson-gxl-aobus-pinctrl";
148 #address-cells = <2>;
149 #size-cells = <2>;
156 reg-names = "mux", "pull", "gpio";
157 gpio-controller;
158 #gpio-cells = <2>;
159 gpio-ranges = <&pinctrl_aobus 0 0 14>;
166 bias-disable;
175 bias-disable;
183 bias-disable;
191 bias-disable;
200 bias-disable;
208 bias-disable;
217 bias-disable;
225 bias-disable;
233 bias-disable;
241 bias-disable;
249 bias-disable;
257 bias-disable;
265 bias-disable;
273 bias-disable;
281 bias-disable;
289 bias-disable;
297 bias-disable;
305 clock-names = "core";
309 compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
311 clock-names = "xtal", "mpeg-clk";
315 compatible = "amlogic,meson-gxl-gpio-intc",
316 "amlogic,meson-gpio-intc";
321 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
325 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
326 clocks = <&clkc CLKID_HDMI_PCLK>,
327 <&clkc CLKID_CLK81>,
328 <&clkc CLKID_GCLK_VENCI_INT0>;
329 clock-names = "isfr", "iahb", "venci";
333 clkc: clock-controller { label
334 compatible = "amlogic,gxl-clkc";
335 #clock-cells = <1>;
337 clock-names = "xtal";
342 clocks = <&clkc CLKID_RNG0>;
343 clock-names = "core";
347 clocks = <&clkc CLKID_I2C>;
351 clocks = <&clkc CLKID_AO_I2C>;
355 clocks = <&clkc CLKID_I2C>;
359 clocks = <&clkc CLKID_I2C>;
364 compatible = "amlogic,meson-gxl-periphs-pinctrl";
365 #address-cells = <2>;
366 #size-cells = <2>;
374 reg-names = "mux", "pull", "pull-enable", "gpio";
375 gpio-controller;
376 #gpio-cells = <2>;
377 gpio-ranges = <&pinctrl_periphs 0 0 100>;
381 mux-0 {
385 bias-pull-up;
388 mux-1 {
391 bias-disable;
395 emmc_ds_pins: emmc-ds {
399 bias-pull-down;
407 bias-pull-down;
418 bias-disable;
422 spi_pins: spi-pins {
428 bias-disable;
432 spi_idle_high_pins: spi-idle-high-pins {
435 bias-pull-up;
439 spi_idle_low_pins: spi-idle-low-pins {
442 bias-pull-down;
446 spi_ss0_pins: spi-ss0 {
450 bias-disable;
455 mux-0 {
462 bias-pull-up;
465 mux-1 {
468 bias-disable;
476 bias-pull-down;
481 mux-0 {
488 bias-pull-up;
491 mux-1 {
494 bias-disable;
502 bias-pull-down;
510 bias-disable;
519 bias-disable;
528 bias-disable;
537 bias-disable;
546 bias-disable;
555 bias-disable;
564 bias-disable;
573 bias-disable;
582 bias-disable;
591 bias-disable;
600 bias-disable;
621 bias-disable;
629 bias-disable;
644 bias-disable;
652 bias-disable;
660 bias-disable;
668 bias-disable;
676 bias-disable;
684 bias-disable;
692 bias-disable;
700 bias-disable;
708 bias-disable;
716 bias-disable;
724 bias-disable;
732 bias-disable;
740 bias-disable;
747 bias-disable;
755 bias-disable;
763 bias-disable;
771 bias-disable;
778 compatible = "amlogic,gxl-mdio-mux";
779 #address-cells = <1>;
780 #size-cells = <0>;
781 clocks = <&clkc CLKID_FCLK_DIV4>;
782 clock-names = "ref";
783 mdio-parent-bus = <&mdio0>;
787 #address-cells = <1>;
788 #size-cells = <0>;
793 #address-cells = <1>;
794 #size-cells = <0>;
796 internal_phy: ethernet-phy@8 {
797 compatible = "ethernet-phy-id0181.4400";
800 max-speed = <100>;
819 reset-names = "viu", "venc", "vcbus", "bt656",
822 clocks = <&clkc CLKID_VPU>,
823 <&clkc CLKID_VAPB>;
824 clock-names = "vpu", "vapb";
831 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
832 <&clkc CLKID_VPU_0>,
833 <&clkc CLKID_VPU>, /* Glitch free mux */
834 <&clkc CLKID_VAPB_0_SEL>,
835 <&clkc CLKID_VAPB_0>,
836 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
837 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
839 <&clkc CLKID_VPU_0>,
840 <&clkc CLKID_FCLK_DIV4>,
842 <&clkc CLKID_VAPB_0>;
843 assigned-clock-rates = <0>, /* Do Nothing */
852 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
854 <&clkc CLKID_SAR_ADC>,
855 <&clkc CLKID_SAR_ADC_CLK>,
856 <&clkc CLKID_SAR_ADC_SEL>;
857 clock-names = "clkin", "core", "adc_clk", "adc_sel";
861 clocks = <&clkc CLKID_SD_EMMC_A>,
862 <&clkc CLKID_SD_EMMC_A_CLK0>,
863 <&clkc CLKID_FCLK_DIV2>;
864 clock-names = "core", "clkin0", "clkin1";
869 clocks = <&clkc CLKID_SD_EMMC_B>,
870 <&clkc CLKID_SD_EMMC_B_CLK0>,
871 <&clkc CLKID_FCLK_DIV2>;
872 clock-names = "core", "clkin0", "clkin1";
877 clocks = <&clkc CLKID_SD_EMMC_C>,
878 <&clkc CLKID_SD_EMMC_C_CLK0>,
879 <&clkc CLKID_FCLK_DIV2>;
880 clock-names = "core", "clkin0", "clkin1";
885 clocks = <&clkc CLKID_HDMI_PCLK>,
886 <&clkc CLKID_CLK81>,
887 <&clkc CLKID_GCLK_VENCI_INT0>;
891 clocks = <&clkc CLKID_SPICC>;
892 clock-names = "core";
894 num-cs = <1>;
898 clocks = <&clkc CLKID_SPI>;
902 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
903 clock-names = "xtal", "pclk", "baud";
908 clock-names = "xtal", "pclk", "baud";
913 clock-names = "xtal", "pclk", "baud";
917 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
918 clock-names = "xtal", "pclk", "baud";
922 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
923 clock-names = "xtal", "pclk", "baud";
927 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
928 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
932 compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
933 clocks = <&clkc CLKID_DOS_PARSER>,
934 <&clkc CLKID_DOS>,
935 <&clkc CLKID_VDEC_1>,
936 <&clkc CLKID_VDEC_HEVC>;
937 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
939 reset-names = "esparser";