Lines Matching +full:gxbb +full:- +full:clkc
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
20 #phy-cells = <0>;
23 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
24 clock-names = "usb_general", "usb";
29 compatible = "amlogic,meson-gxbb-usb2-phy";
30 #phy-cells = <0>;
33 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
34 clock-names = "usb_general", "usb";
39 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
42 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
43 clock-names = "otg";
45 phy-names = "usb2-phy";
51 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
54 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
55 clock-names = "otg";
57 phy-names = "usb2-phy";
65 compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
66 clocks = <&clkc CLKID_AIU_GLUE>,
67 <&clkc CLKID_I2S_OUT>,
68 <&clkc CLKID_AOCLK_GATE>,
69 <&clkc CLKID_CTS_AMCLK>,
70 <&clkc CLKID_MIXER_IFACE>,
71 <&clkc CLKID_IEC958>,
72 <&clkc CLKID_IEC958_GATE>,
73 <&clkc CLKID_CTS_MCLK_I958>,
74 <&clkc CLKID_CTS_I958>;
75 clock-names = "pclk",
89 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
90 #address-cells = <2>;
91 #size-cells = <2>;
98 reg-names = "mux", "pull", "gpio";
99 gpio-controller;
100 #gpio-cells = <2>;
101 gpio-ranges = <&pinctrl_aobus 0 0 14>;
108 bias-disable;
117 bias-disable;
125 bias-disable;
134 bias-disable;
142 bias-disable;
151 bias-disable;
159 bias-disable;
167 bias-disable;
175 bias-disable;
183 bias-disable;
191 bias-disable;
199 bias-disable;
207 bias-disable;
215 bias-disable;
223 bias-disable;
231 bias-disable;
246 bias-disable;
254 bias-disable;
262 bias-disable;
270 compatible = "amlogic,meson-gxbb-spifc";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 clocks = <&clkc CLKID_SPI>;
281 clock-names = "core";
285 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
291 clocks = <&clkc CLKID_EFUSE>;
295 clocks = <&clkc CLKID_ETH>,
296 <&clkc CLKID_FCLK_DIV2>,
297 <&clkc CLKID_MPLL2>,
298 <&clkc CLKID_FCLK_DIV2>;
299 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
303 compatible = "amlogic,meson-gxbb-gpio-intc",
304 "amlogic,meson-gpio-intc";
309 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
313 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
314 clocks = <&clkc CLKID_HDMI_PCLK>,
315 <&clkc CLKID_CLK81>,
316 <&clkc CLKID_GCLK_VENCI_INT0>;
317 clock-names = "isfr", "iahb", "venci";
321 clkc: clock-controller { label
322 compatible = "amlogic,gxbb-clkc";
323 #clock-cells = <1>;
325 clock-names = "xtal";
330 clocks = <&clkc CLKID_RNG0>;
331 clock-names = "core";
335 clocks = <&clkc CLKID_I2C>;
339 clocks = <&clkc CLKID_AO_I2C>;
343 clocks = <&clkc CLKID_I2C>;
347 clocks = <&clkc CLKID_I2C>;
351 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
353 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
354 clock-names = "bus", "core";
356 assigned-clocks = <&clkc CLKID_GP0_PLL>;
357 assigned-clock-rates = <744000000>;
362 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
363 #address-cells = <2>;
364 #size-cells = <2>;
372 reg-names = "mux", "pull", "pull-enable", "gpio";
373 gpio-controller;
374 #gpio-cells = <2>;
375 gpio-ranges = <&pinctrl_periphs 0 0 119>;
379 mux-0 {
383 bias-pull-up;
386 mux-1 {
389 bias-disable;
393 emmc_ds_pins: emmc-ds {
397 bias-pull-down;
405 bias-pull-down;
416 bias-disable;
420 spi_pins: spi-pins {
426 bias-disable;
430 spi_idle_high_pins: spi-idle-high-pins {
433 bias-pull-up;
437 spi_idle_low_pins: spi-idle-low-pins {
440 bias-pull-down;
444 spi_ss0_pins: spi-ss0 {
448 bias-disable;
453 mux-0 {
460 bias-pull-up;
463 mux-1 {
466 bias-disable;
474 bias-pull-down;
479 mux-0 {
486 bias-pull-up;
489 mux-1 {
492 bias-disable;
500 bias-pull-down;
508 bias-disable;
517 bias-disable;
526 bias-disable;
535 bias-disable;
544 bias-disable;
553 bias-disable;
562 bias-disable;
571 bias-disable;
580 bias-disable;
589 bias-disable;
593 eth_rgmii_pins: eth-rgmii {
610 bias-disable;
614 eth_rmii_pins: eth-rmii {
626 bias-disable;
634 bias-disable;
642 bias-disable;
650 bias-disable;
658 bias-disable;
666 bias-disable;
674 bias-disable;
682 bias-disable;
690 bias-disable;
698 bias-disable;
706 bias-disable;
714 bias-disable;
722 bias-disable;
730 bias-disable;
749 reset-names = "viu", "venc", "vcbus", "bt656",
752 clocks = <&clkc CLKID_VPU>,
753 <&clkc CLKID_VAPB>;
754 clock-names = "vpu", "vapb";
761 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
762 <&clkc CLKID_VPU_0>,
763 <&clkc CLKID_VPU>, /* Glitch free mux */
764 <&clkc CLKID_VAPB_0_SEL>,
765 <&clkc CLKID_VAPB_0>,
766 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
767 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
769 <&clkc CLKID_VPU_0>,
770 <&clkc CLKID_FCLK_DIV4>,
772 <&clkc CLKID_VAPB_0>;
773 assigned-clock-rates = <0>, /* Do Nothing */
782 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
784 <&clkc CLKID_SAR_ADC>,
785 <&clkc CLKID_SAR_ADC_CLK>,
786 <&clkc CLKID_SAR_ADC_SEL>;
787 clock-names = "clkin", "core", "adc_clk", "adc_sel";
791 clocks = <&clkc CLKID_SD_EMMC_A>,
792 <&clkc CLKID_SD_EMMC_A_CLK0>,
793 <&clkc CLKID_FCLK_DIV2>;
794 clock-names = "core", "clkin0", "clkin1";
799 clocks = <&clkc CLKID_SD_EMMC_B>,
800 <&clkc CLKID_SD_EMMC_B_CLK0>,
801 <&clkc CLKID_FCLK_DIV2>;
802 clock-names = "core", "clkin0", "clkin1";
807 clocks = <&clkc CLKID_SD_EMMC_C>,
808 <&clkc CLKID_SD_EMMC_C_CLK0>,
809 <&clkc CLKID_FCLK_DIV2>;
810 clock-names = "core", "clkin0", "clkin1";
815 clocks = <&clkc CLKID_HDMI_PCLK>,
816 <&clkc CLKID_CLK81>,
817 <&clkc CLKID_GCLK_VENCI_INT0>;
821 clocks = <&clkc CLKID_SPICC>;
822 clock-names = "core";
824 num-cs = <1>;
828 clocks = <&clkc CLKID_SPI>;
832 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
833 clock-names = "xtal", "pclk", "baud";
838 clock-names = "xtal", "pclk", "baud";
843 clock-names = "xtal", "pclk", "baud";
847 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
848 clock-names = "xtal", "pclk", "baud";
852 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
853 clock-names = "xtal", "pclk", "baud";
857 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
858 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
862 compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
863 clocks = <&clkc CLKID_DOS_PARSER>,
864 <&clkc CLKID_DOS>,
865 <&clkc CLKID_VDEC_1>,
866 <&clkc CLKID_VDEC_HEVC>;
867 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
869 reset-names = "esparser";