Lines Matching +full:opp +full:- +full:0

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-g12.dtsi"
12 		#address-cells = <0x2>;
13 		#size-cells = <0x0>;
15 		cpu0: cpu@0 {
17 			compatible = "arm,cortex-a53";
18 			reg = <0x0 0x0>;
19 			enable-method = "psci";
20 			next-level-cache = <&l2>;
21 			#cooling-cells = <2>;
26 			compatible = "arm,cortex-a53";
27 			reg = <0x0 0x1>;
28 			enable-method = "psci";
29 			next-level-cache = <&l2>;
30 			#cooling-cells = <2>;
35 			compatible = "arm,cortex-a53";
36 			reg = <0x0 0x2>;
37 			enable-method = "psci";
38 			next-level-cache = <&l2>;
39 			#cooling-cells = <2>;
44 			compatible = "arm,cortex-a53";
45 			reg = <0x0 0x3>;
46 			enable-method = "psci";
47 			next-level-cache = <&l2>;
48 			#cooling-cells = <2>;
51 		l2: l2-cache0 {
53 			cache-level = <2>;
54 			cache-unified;
58 	cpu_opp_table: opp-table {
59 		compatible = "operating-points-v2";
60 		opp-shared;
62 		opp-1000000000 {
63 			opp-hz = /bits/ 64 <1000000000>;
64 			opp-microvolt = <731000>;
67 		opp-1200000000 {
68 			opp-hz = /bits/ 64 <1200000000>;
69 			opp-microvolt = <731000>;
72 		opp-1398000000 {
73 			opp-hz = /bits/ 64 <1398000000>;
74 			opp-microvolt = <761000>;
77 		opp-1512000000 {
78 			opp-hz = /bits/ 64 <1512000000>;
79 			opp-microvolt = <791000>;
82 		opp-1608000000 {
83 			opp-hz = /bits/ 64 <1608000000>;
84 			opp-microvolt = <831000>;
87 		opp-1704000000 {
88 			opp-hz = /bits/ 64 <1704000000>;
89 			opp-microvolt = <861000>;
92 		opp-1800000000 {
93 			opp-hz = /bits/ 64 <1800000000>;
94 			opp-microvolt = <981000>;
100 	cooling-maps {
103 			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
111 			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
120 	compatible = "amlogic,g12a-ddr-pmu";