Lines Matching +full:0 +full:x2c00
23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0 0x0>;
37 reg = <0x0 0x1>;
72 size = <0x0 0x800000>;
73 alignment = <0x0 0x400000>;
95 reg = <0x0 0xfd000400 0x0 0x290>;
98 #size-cells = <0>;
105 reg = <0x0 0xfe000000 0x0 0x1000000>;
108 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
110 reset: reset-controller@0 {
112 reg = <0x0 0x0 0x0 0x8c>;
123 reg = <0x0 0x0400 0x0 0x003c>,
124 <0x0 0x0480 0x0 0x0118>;
128 gpio-ranges = <&periphs_pinctrl 0 0 62>;
473 reg = <0x0 0x0440 0x0 0x14>;
482 reg = <0 0x800 0 0x104>;
498 reg = <0x0 0x1400 0x0 0x20>;
501 #size-cells = <0>;
509 reg = <0x0 0x1c00 0x0 0x18>;
519 reg = <0x0 0x2000 0x0 0x18>;
529 reg = <0x0 0x2400 0x0 0x24>;
540 reg = <0x0 0x2800 0x0 0x24>;
551 reg = <0x0 0x2c00 0x0 0x48>;
567 reg = <0x0 0x5c00 0x0 0x20>;
570 #size-cells = <0>;
578 reg = <0x0 0x6800 0x0 0x20>;
581 #size-cells = <0>;
589 reg = <0x0 0x6c00 0x0 0x20>;
592 #size-cells = <0>;
601 reg = <0x0 0x4000 0x0 0x60>;
604 #phy-cells = <0>;
610 reg = <0x0 0x4c00 0x0 0x50>;
615 #thermal-sensor-cells = <0>;
622 reg = <0x0 0x5118 0x0 0x4>;
628 reg = <0x0 0x5a20 0x0 0x140>;
635 reg = <0x0 0x5400 0x0 0x24>;
645 reg = <0 0x7c80 0 0x18c>;
654 reg = <0x0 0x10000 0x0 0x800>;
673 reg = <0x0 0xfe004400 0x0 0xa0>;
694 reg = <0x0 0xff400000 0x0 0x100000>;
698 snps,quirk-frame-length-adjustment = <0x20>;
704 reg = <0x0 0xff500000 0x0 0x40000>;
719 reg = <0x0 0xff901000 0x0 0x1000>,
720 <0x0 0xff902000 0x0 0x2000>,
721 <0x0 0xff904000 0x0 0x2000>,
722 <0x0 0xff906000 0x0 0x2000>;
727 #address-cells = <0>;
734 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
736 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
738 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
740 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
747 #clock-cells = <0>;