Lines Matching +full:opp +full:- +full:816000000
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
5 cpu_opp_table: opp-table-cpu {
6 compatible = "operating-points-v2";
7 opp-shared;
9 opp-408000000 {
10 opp-hz = /bits/ 64 <408000000>;
11 opp-microvolt = <1000000 1000000 1310000>;
12 clock-latency-ns = <244144>; /* 8 32k periods */
15 opp-648000000 {
16 opp-hz = /bits/ 64 <648000000>;
17 opp-microvolt = <1040000 1040000 1310000>;
18 clock-latency-ns = <244144>; /* 8 32k periods */
21 opp-816000000 {
22 opp-hz = /bits/ 64 <816000000>;
23 opp-microvolt = <1080000 1080000 1310000>;
24 clock-latency-ns = <244144>; /* 8 32k periods */
27 opp-912000000 {
28 opp-hz = /bits/ 64 <912000000>;
29 opp-microvolt = <1120000 1120000 1310000>;
30 clock-latency-ns = <244144>; /* 8 32k periods */
33 opp-960000000 {
34 opp-hz = /bits/ 64 <960000000>;
35 opp-microvolt = <1160000 1160000 1310000>;
36 clock-latency-ns = <244144>; /* 8 32k periods */
39 opp-1008000000 {
40 opp-hz = /bits/ 64 <1008000000>;
41 opp-microvolt = <1200000 1200000 1310000>;
42 clock-latency-ns = <244144>; /* 8 32k periods */
45 opp-1056000000 {
46 opp-hz = /bits/ 64 <1056000000>;
47 opp-microvolt = <1240000 1240000 1310000>;
48 clock-latency-ns = <244144>; /* 8 32k periods */
51 opp-1104000000 {
52 opp-hz = /bits/ 64 <1104000000>;
53 opp-microvolt = <1260000 1260000 1310000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
57 opp-1152000000 {
58 opp-hz = /bits/ 64 <1152000000>;
59 opp-microvolt = <1300000 1300000 1310000>;
60 clock-latency-ns = <244144>; /* 8 32k periods */
66 operating-points-v2 = <&cpu_opp_table>;
70 operating-points-v2 = <&cpu_opp_table>;
74 operating-points-v2 = <&cpu_opp_table>;
78 operating-points-v2 = <&cpu_opp_table>;