Lines Matching +full:0 +full:x01c0c000
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
124 #clock-cells = <0>;
131 #clock-cells = <0>;
153 #size-cells = <0>;
164 simple-audio-card,dai-link@0 {
175 sound-dai = <&codec 0>;
197 polling-delay-passive = <0>;
198 polling-delay = <0>;
199 thermal-sensors = <&ths 0>;
244 polling-delay-passive = <0>;
245 polling-delay = <0>;
251 polling-delay-passive = <0>;
252 polling-delay = <0>;
265 reg = <0x1000000 0x400000>;
269 ranges = <0 0x1000000 0x400000>;
271 display_clocks: clock@0 {
273 reg = <0x0 0x10000>;
286 reg = <0x20000 0x10000>;
296 compatible = "allwinner,sun50i-a64-de2-mixer-0";
297 reg = <0x100000 0x100000>;
306 #size-cells = <0>;
310 #size-cells = <0>;
313 mixer0_out_tcon0: endpoint@0 {
314 reg = <0>;
328 reg = <0x200000 0x100000>;
337 #size-cells = <0>;
341 #size-cells = <0>;
344 mixer1_out_tcon0: endpoint@0 {
345 reg = <0>;
360 reg = <0x01c00000 0x1000>;
367 reg = <0x00018000 0x28000>;
370 ranges = <0 0x00018000 0x28000>;
372 de2_sram: sram-section@0 {
374 reg = <0x0000 0x28000>;
380 reg = <0x01d00000 0x40000>;
383 ranges = <0 0x01d00000 0x40000>;
385 ve_sram: sram-section@0 {
388 reg = <0x000000 0x40000>;
395 reg = <0x01c02000 0x1000>;
407 reg = <0x01c0c000 0x1000>;
412 #clock-cells = <0>;
418 #size-cells = <0>;
420 tcon0_in: port@0 {
422 #size-cells = <0>;
423 reg = <0>;
425 tcon0_in_mixer0: endpoint@0 {
426 reg = <0>;
438 #size-cells = <0>;
453 reg = <0x01c0d000 0x1000>;
462 #size-cells = <0>;
464 tcon1_in: port@0 {
466 #size-cells = <0>;
467 reg = <0>;
469 tcon1_in_mixer0: endpoint@0 {
470 reg = <0>;
482 #size-cells = <0>;
495 reg = <0x01c0e000 0x1000>;
506 reg = <0x01c0f000 0x1000>;
515 #size-cells = <0>;
520 reg = <0x01c10000 0x1000>;
529 #size-cells = <0>;
534 reg = <0x01c11000 0x1000>;
543 #size-cells = <0>;
548 reg = <0x1c14000 0x400>;
553 reg = <0x34 0x8>;
559 reg = <0x01c15000 0x1000>;
569 reg = <0x01c17000 0x1000>;
578 reg = <0x01c19000 0x0400>;
583 phys = <&usbphy 0>;
585 extcon = <&usbphy 0>;
592 reg = <0x01c19400 0x14>,
593 <0x01c1a800 0x4>,
594 <0x01c1b800 0x4>;
612 reg = <0x01c1a000 0x100>;
619 phys = <&usbphy 0>;
626 reg = <0x01c1a400 0x100>;
631 phys = <&usbphy 0>;
638 reg = <0x01c1b000 0x100>;
652 reg = <0x01c1b400 0x100>;
664 reg = <0x01c20000 0x400>;
673 reg = <0x01c20800 0x400>;
841 reg = <0x01c20c00 0xa0>;
850 reg = <0x01c20ca0 0x20>;
856 #sound-dai-cells = <0>;
859 reg = <0x01c21000 0x400>;
867 pinctrl-0 = <&spdif_tx_pin>;
874 reg = <0x01c21800 0x400>;
881 #sound-dai-cells = <0>;
884 reg = <0x01c22000 0x400>;
895 #sound-dai-cells = <0>;
898 reg = <0x01c22400 0x400>;
909 #sound-dai-cells = <0>;
912 reg = <0x01c22800 0x400>;
923 #sound-dai-cells = <0>;
925 reg = <0x01c22c00 0x200>;
939 reg = <0x01c22e00 0x600>;
948 reg = <0x01c25000 0x100>;
960 reg = <0x01c28000 0x400>;
961 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
971 reg = <0x01c28400 0x400>;
982 reg = <0x01c28800 0x400>;
993 reg = <0x01c28c00 0x400>;
1004 reg = <0x01c29000 0x400>;
1015 reg = <0x01c2ac00 0x400>;
1020 pinctrl-0 = <&i2c0_pins>;
1023 #size-cells = <0>;
1028 reg = <0x01c2b000 0x400>;
1033 pinctrl-0 = <&i2c1_pins>;
1036 #size-cells = <0>;
1041 reg = <0x01c2b400 0x400>;
1046 pinctrl-0 = <&i2c2_pins>;
1049 #size-cells = <0>;
1054 reg = <0x01c68000 0x1000>;
1061 pinctrl-0 = <&spi0_pins>;
1066 #size-cells = <0>;
1071 reg = <0x01c69000 0x1000>;
1078 pinctrl-0 = <&spi1_pins>;
1083 #size-cells = <0>;
1089 reg = <0x01c30000 0x10000>;
1101 #size-cells = <0>;
1107 reg = <0x01c40000 0x10000>;
1130 reg = <0x01c81000 0x1000>,
1131 <0x01c82000 0x2000>,
1132 <0x01c84000 0x2000>,
1133 <0x01c86000 0x2000>;
1142 reg = <0x01c21400 0x400>;
1145 pinctrl-0 = <&pwm_pin>;
1152 reg = <0x01c62000 0x1000>,
1153 <0x01c63000 0x1000>;
1162 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1168 reg = <0x01cb0000 0x1000>;
1176 pinctrl-0 = <&csi_pins>;
1182 reg = <0x01ca0000 0x1000>;
1190 #size-cells = <0>;
1202 reg = <0x01ca1000 0x1000>;
1209 #phy-cells = <0>;
1215 reg = <0x01e00000 0x20000>;
1229 reg = <0x01ee0000 0x10000>;
1243 #size-cells = <0>;
1245 hdmi_in: port@0 {
1246 reg = <0>;
1261 reg = <0x01ef0000 0x10000>;
1264 clock-names = "bus", "mod", "pll-0";
1267 #phy-cells = <0>;
1273 reg = <0x01f00000 0x400>;
1287 reg = <0x01f00c00 0x400>;
1293 reg = <0x01f01400 0x100>;
1303 reg = <0x01f015c0 0x4>;
1310 reg = <0x01f02400 0x400>;
1316 #size-cells = <0>;
1322 reg = <0x01f02000 0x400>;
1328 pinctrl-0 = <&r_ir_rx_pin>;
1335 reg = <0x01f03800 0x400>;
1338 pinctrl-0 = <&r_pwm_pin>;
1345 reg = <0x01f02c00 0x400>;
1378 reg = <0x01f03400 0x400>;
1384 pinctrl-0 = <&r_rsb_pins>;
1387 #size-cells = <0>;