Lines Matching +full:0 +full:x840
39 pinctrl-0 = <&cm_t43_led_pins>;
43 AM4372_IOPAD(0xa78, MUX_MODE7)
49 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
50 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
56 AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
57 AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
58 AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
59 AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
60 AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
61 AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
62 AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad14.mmc1_dat6 */
63 AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad15.mmc1_dat7 */
64 AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
65 AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
71 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
72 AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
73 AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
74 AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
80 AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
81 AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
82 AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
83 AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
84 AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
85 AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
86 AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
87 AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
88 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
89 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
90 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
91 AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
92 AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
93 AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
94 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
101 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
102 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
103 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
104 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
105 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
106 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
107 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
108 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
109 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
110 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
111 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
112 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
113 AM4372_IOPAD(0xa74, MUX_MODE3)
115 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.txen */
116 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rxctl */
117 AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.txd3 */
118 AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.txd2 */
119 AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.txd1 */
120 AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.txd0 */
121 AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.tclk */
122 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rclk */
123 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rxd3 */
124 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rxd2 */
125 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rxd1 */
126 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rxd0 */
127 AM4372_IOPAD(0xa38, MUX_MODE7)
134 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
135 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
143 pinctrl-0 = <&nand_flash_x8>;
144 ranges = <0 0 0x08000000 0x1000000>;
145 nand@0,0 {
147 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
149 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
156 gpmc,sync-clk-ps = <0>;
157 gpmc,cs-on-ns = <0>;
163 gpmc,we-on-ns = <0>;
165 gpmc,oe-on-ns = <0>;
170 gpmc,bus-turnaround-ns = <0>;
171 gpmc,cycle2cycle-delay-ns = <0>;
172 gpmc,clk-activation-ns = <0>;
174 gpmc,wr-data-mux-bus-ns = <0>;
179 partition@0 {
181 reg = <0x0 0x00980000>;
185 reg = <0x00980000 0x00080000>;
189 reg = <0x00a00000 0x0>;
197 pinctrl-0 = <&i2c0_pins>;
202 reg = <0x24>;
259 reg = <0x50>;
291 pinctrl-0 = <&emmc_pins>;
300 pinctrl-0 = <&spi0_pins>;
301 dmas = <&edma 16 0
302 &edma 17 0>;
305 flash: flash@0 {
309 reg = <0>;
311 partition@0 {
313 reg = <0x0 0xc0000>;
318 reg = <0xc0000 0x40000>;
323 reg = <0x100000 0x100000>;
330 pinctrl-0 = <&cpsw_default>;
336 pinctrl-0 = <&davinci_mdio_default>;
338 ethphy0: ethernet-phy@0 {
339 reg = <0>;
403 ti,wire-config = <0x00 0x11 0x22 0x33>;