Lines Matching +full:0 +full:x0900
31 reg = <0x80000000 0x40000000>; /* 1 GB */
47 * are 0xf0 for the control bits, and 0x7777 for the data bits. However, the
65 ethphy0: ethernet-phy@0 {
66 reg = <0x2>;
69 rxdv-skew-ps = <0>;
71 rxd3-skew-ps = <0>;
72 rxd2-skew-ps = <0>;
73 rxd1-skew-ps = <0>;
74 rxd0-skew-ps = <0>;
80 reg = <0x1>;
83 rxdv-skew-ps = <0>;
85 rxd3-skew-ps = <0>;
86 rxd2-skew-ps = <0>;
87 rxd1-skew-ps = <0>;
88 rxd0-skew-ps = <0>;
97 pinctrl-0 = <&mmc2_pins>;
111 reg = <0x70>;
113 #size-cells = <0>;
116 i2c@0 {
119 #size-cells = <0>;
120 reg = <0>;
126 #size-cells = <0>;
133 #size-cells = <0>;
140 #size-cells = <0>;
147 #size-cells = <0>;
153 #size-cells = <0>;
156 ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };
157 ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
158 ina230@42 { compatible = "ti,ina230"; reg = <0x42>; shunt-resistor = <5000>; };
160 ina230@44 { compatible = "ti,ina230"; reg = <0x44>; shunt-resistor = <5000>; };
161 ina230@45 { compatible = "ti,ina230"; reg = <0x45>; shunt-resistor = <5000>; };
162 ina230@46 { compatible = "ti,ina230"; reg = <0x46>; shunt-resistor = <5000>; };
164 ina230@47 { compatible = "ti,ina230"; reg = <0x47>; shunt-resistor = <5500>; };
165 ina230@48 { compatible = "ti,ina230"; reg = <0x48>; shunt-resistor = <2360>; };
166 ina230@49 { compatible = "ti,ina230"; reg = <0x49>; shunt-resistor = <2360>; };
167 ina230@43 { compatible = "ti,ina230"; reg = <0x43>; shunt-resistor = <2360>; };
168 ina230@4b { compatible = "ti,ina230"; reg = <0x4b>; shunt-resistor = <5500>; };
169 ina230@4c { compatible = "ti,ina230"; reg = <0x4c>; shunt-resistor = <2360>; };
170 ina230@4d { compatible = "ti,ina230"; reg = <0x4d>; shunt-resistor = <770>; };
171 ina230@4e { compatible = "ti,ina230"; reg = <0x4e>; shunt-resistor = <770>; };
172 ina230@4f { compatible = "ti,ina230"; reg = <0x4f>; shunt-resistor = <770>; };
178 #size-cells = <0>;
184 #size-cells = <0>;
189 reg = <0x20>;
203 reg = <0x21>;
216 reg = <0x22>;
220 sw-gpios = <&u48 0 0>, <&u48 1 0>, <&u48 2 0>, <&u48 3 0>,
221 <&u48 4 0>, <&u48 5 0>, <&u48 6 0>, <&u48 7 0>;
222 led-gpios = <&u48 7 0>, <&u48 6 0>, <&u48 5 0>, <&u48 4 0>,
223 <&u48 3 0>, <&u48 2 0>, <&u48 1 0>, <&u48 0 0>;
235 reg = <0x23>;
246 tmp100@48 { compatible = "ti,tmp100"; reg = <0x48>; };
247 tmp100@4a { compatible = "ti,tmp100"; reg = <0x4a>; };
248 tmp100@4b { compatible = "ti,tmp100"; reg = <0x4b>; };
249 tmp100@4c { compatible = "ti,tmp100"; reg = <0x4c>; };
252 at24c01@57 { compatible = "atmel,24c01"; reg = <0x57>; };
253 at24cs01@5f { compatible = "atmel,24cs01"; reg = <0x5f>; };
261 reg = <0x71>;
263 #size-cells = <0>;
268 #size-cells = <0>;
273 at24c08@54 { compatible="atmel,24c08"; reg=<0x54>; };
274 at24cs08@5c { compatible="atmel,24cs08"; reg=<0x5c>; };
277 tmp421@4d { compatible="ti,tmp421"; reg=<0x4d>; };
278 tmp421@4e { compatible="ti,tmp421"; reg=<0x4e>; };
279 ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <2360>; };
280 amc6821@18 { compatible = "ti,amc6821"; reg = <0x18>; };
290 DM814X_IOPAD(0x0800, PIN_INPUT | 0x1) /* SD1_CLK */
291 DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1) /* SD1_CMD */
292 DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[0] */
293 DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[1] */
294 DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[2] */
295 DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[3] */
296 DM814X_IOPAD(0x0924, PIN_INPUT_PULLUP | 0x40) /* SD1_POW */
297 DM814X_IOPAD(0x0928, PIN_INPUT | 0x40) /* SD1_SDWP */
298 DM814X_IOPAD(0x093C, PIN_INPUT | 0x2) /* SD1_SDCD */
304 DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1) /* USB0_DRVVBUS */
310 DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80) /* USB1_DRVVBUS */
316 DM814X_IOPAD(0x081c, PIN_OUTPUT | 0x80) /* PROGRAM_B */
317 DM814X_IOPAD(0x0820, PIN_INPUT | 0x80) /* INIT_B */
318 DM814X_IOPAD(0x0824, PIN_INPUT | 0x80) /* DONE */
320 DM814X_IOPAD(0x0838, PIN_INPUT_PULLUP | 0x80) /* FMCA_TMS */
321 DM814X_IOPAD(0x083c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TCK */
322 DM814X_IOPAD(0x0898, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDO */
323 DM814X_IOPAD(0x089c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDI */
324 DM814X_IOPAD(0x08ac, PIN_INPUT_PULLUP | 0x80) /* FMCA_TRST */
326 DM814X_IOPAD(0x08b0, PIN_INPUT_PULLUP | 0x80) /* FMCB_TMS */
327 DM814X_IOPAD(0x0a88, PIN_INPUT_PULLUP | 0x80) /* FMCB_TCK */
328 DM814X_IOPAD(0x0a8c, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDO */
329 DM814X_IOPAD(0x08bc, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDI */
330 DM814X_IOPAD(0x0a94, PIN_INPUT_PULLUP | 0x80) /* FMCB_TRST */
332 DM814X_IOPAD(0x08d4, PIN_INPUT_PULLUP | 0x80) /* FPGA_TMS */
333 DM814X_IOPAD(0x0aa8, PIN_INPUT_PULLUP | 0x80) /* FPGA_TCK */
334 DM814X_IOPAD(0x0adc, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDO */
335 DM814X_IOPAD(0x0ab0, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDI */
341 DM814X_IOPAD(0x090c, PIN_INPUT_PULLUP | 0x80) /* PHY A IRQ */
342 DM814X_IOPAD(0x0910, PIN_INPUT_PULLUP | 0x80) /* PHY A RESET */
343 DM814X_IOPAD(0x08f4, PIN_INPUT_PULLUP | 0x80) /* PHY B IRQ */
344 DM814X_IOPAD(0x08f8, PIN_INPUT_PULLUP | 0x80) /* PHY B RESET */
346 //DM814X_IOPAD(0x0a14, PIN_INPUT_PULLUP | 0x80) /* ARM IRQ */
347 //DM814X_IOPAD(0x0900, PIN_INPUT | 0x80) /* GPIO IRQ */
348 DM814X_IOPAD(0x0a2c, PIN_INPUT_PULLUP | 0x80) /* GPIO RESET */
358 DM814X_IOPAD(0x0b3c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO0 */
359 DM814X_IOPAD(0x0b40, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO1 */
360 DM814X_IOPAD(0x0b44, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO2 */
361 DM814X_IOPAD(0x0b48, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO3 */
362 DM814X_IOPAD(0x0b4c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO4 */
363 DM814X_IOPAD(0x0b50, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO5 */
369 DM814X_IOPAD(0x0950, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS1 as GPIO */
370 DM814X_IOPAD(0x0818, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS2 as GPIO */
376 DM814X_IOPAD(0x0a7c, 0x20)
377 DM814X_IOPAD(0x0b74, 0x20)
378 DM814X_IOPAD(0x0b78, PIN_OUTPUT | 0x20)
379 DM814X_IOPAD(0x0b7c, PIN_OUTPUT_PULLDOWN | 0x20)
380 DM814X_IOPAD(0x0b80, PIN_INPUT | 0x20)
387 pinctrl-0 = <&gpio1_pins>;
389 "", "PROGRAM_B", "INIT_B", "DONE", /* 0-3 */
401 pinctrl-0 = <&gpio2_pins>;
403 "PHYA_IRQ_N", "PHYA_RESET_N", "", "", /* 0-3 */
410 /*pinctrl-0 = <&gpio3_pins>;*/
412 "", "", "ARMClkSel0", "", /* 0-3 */
418 pinctrl-0 = <&gpio4_pins>;
426 pinctrl-0 = <&usb0_pins>;
432 pinctrl-0 = <&usb1_pins>;
437 flash@0 {
441 reg = <0>;
444 fsbl@0 {
447 reg = <0 0x40000>;
452 reg = <0x40000 0x80000>;
457 reg = <0xc0000 0x40000>;
462 reg = <0x100000 0x400000>;
466 reg = <0x500000 0x40000>;
470 reg = <0x540000 0x1ac0000>;
477 dmas = <&edma_xbar 8 0 16 &edma_xbar 9 0 17
478 &edma_xbar 10 0 18 &edma_xbar 11 0 19>;
484 pinctrl-0 = <&spi4_pins>;
487 dmas = <&edma_xbar 12 0 20 &edma_xbar 13 0 21>;