Lines Matching +full:0 +full:xd000

22 		#size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0>;
113 #clock-cells = <0>;
122 ranges = <0 0xf7000000 0x1000000>;
127 reg = <0xab0000 0x200>;
136 reg = <0xab0800 0x200>;
145 reg = <0xab1000 0x200>;
154 reg = <0xac0000 0x1000>;
163 reg = <0xad0000 0x58>;
168 reg = <0xad0600 0x20>;
175 reg = <0xad1000 0x1000>, <0xad0100 0x100>;
182 reg = <0xa2f400 0x128>;
183 #phy-cells = <0>;
184 resets = <&chip_rst 0x104 14>;
190 reg = <0xa30000 0x10000>;
200 reg = <0xb74000 0x128>;
201 #phy-cells = <0>;
202 resets = <&chip_rst 0x104 12>;
208 reg = <0xb78000 0x128>;
209 #phy-cells = <0>;
210 resets = <&chip_rst 0x104 13>;
216 reg = <0xb90000 0x10000>;
222 #size-cells = <0>;
227 ethphy0: ethernet-phy@0 {
228 reg = <0>;
234 reg = <0xdd0000 0x10000>;
242 ranges = <0 0xe80000 0x10000>;
247 reg = <0x0400 0x400>;
249 #size-cells = <0>;
251 porta: gpio-port@0 {
256 reg = <0>;
259 interrupts = <0>;
265 reg = <0x0800 0x400>;
267 #size-cells = <0>;
274 reg = <0>;
283 reg = <0x0c00 0x400>;
285 #size-cells = <0>;
292 reg = <0>;
301 reg = <0x1000 0x400>;
303 #size-cells = <0>;
310 reg = <0>;
320 #size-cells = <0>;
321 reg = <0x1400 0x100>;
324 pinctrl-0 = <&twsi0_pmux>;
332 #size-cells = <0>;
333 reg = <0x1800 0x100>;
336 pinctrl-0 = <&twsi1_pmux>;
343 reg = <0x2c00 0x14>;
351 reg = <0x2c14 0x14>;
358 reg = <0x2c28 0x14>;
366 reg = <0x2c3c 0x14>;
374 reg = <0x2c50 0x14>;
382 reg = <0x2c64 0x14>;
390 reg = <0x2c78 0x14>;
398 reg = <0x2c8c 0x14>;
406 reg = <0x3800 0x30>;
416 reg = <0xea0000 0x400>, <0xdd0170 0x10>;
452 reg = <0xe90000 0x1000>;
456 #size-cells = <0>;
458 sata0: sata-port@0 {
459 reg = <0>;
460 phys = <&sata_phy 0>;
473 reg = <0xe900a0 0x200>;
476 #size-cells = <0>;
480 sata-phy@0 {
481 reg = <0>;
491 reg = <0xed0000 0x10000>;
501 reg = <0xee0000 0x10000>;
511 reg = <0xf20000 0x40>;
521 ranges = <0 0xfc0000 0x10000>;
526 reg = <0x1000 0x100>;
528 interrupts = <0>;
533 reg = <0x2000 0x100>;
540 reg = <0x3000 0x100>;
547 reg = <0x5000 0x400>;
549 #size-cells = <0>;
556 reg = <0>;
563 #size-cells = <0>;
564 reg = <0x7000 0x100>;
567 pinctrl-0 = <&twsi2_pmux>;
575 #size-cells = <0>;
576 reg = <0x8000 0x100>;
579 pinctrl-0 = <&twsi3_pmux>;
586 reg = <0x9000 0x100>;
590 pinctrl-0 = <&uart0_pmux>;
597 reg = <0xa000 0x100>;
601 pinctrl-0 = <&uart1_pmux>;
608 reg = <0xc000 0x400>;
610 #size-cells = <0>;
617 reg = <0>;
623 reg = <0xd000 0x100>;
658 reg = <0xe000 0x30>;