Lines Matching +full:onkey +full:- +full:falling
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
24 reserved-memory {
25 #address-cells = <1>;
26 #size-cells = <1>;
30 compatible = "shared-dma-pool";
32 no-map;
36 compatible = "shared-dma-pool";
38 no-map;
42 compatible = "shared-dma-pool";
44 no-map;
48 compatible = "shared-dma-pool";
50 no-map;
54 compatible = "shared-dma-pool";
56 no-map;
60 compatible = "shared-dma-pool";
62 no-map;
67 compatible = "regulator-fixed";
68 regulator-name = "vio";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
72 regulator-always-on;
73 regulator-boot-on;
74 vin-supply = <&vdd>;
79 vdd-supply = <&vdd>;
80 vdda-supply = <&vdda>;
81 vref-supply = <&vdda>;
88 st,min-sample-time-ns = <5000>;
95 st,min-sample-time-ns = <5000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
106 vref-supply = <&vdda>;
123 pinctrl-0 = <ðernet0_rmii_pins_c &mco2_pins_a>;
124 pinctrl-1 = <ðernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
125 pinctrl-names = "default", "sleep";
126 phy-mode = "rmii";
127 max-speed = <100>;
128 phy-handle = <&phy0>;
131 #address-cells = <1>;
132 #size-cells = <0>;
133 compatible = "snps,dwmac-mdio";
135 phy0: ethernet-phy@1 {
138 compatible = "ethernet-phy-id0007.c0f0",
139 "ethernet-phy-ieee802.3-c22";
141 reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
142 reset-assert-us = <500>;
143 reset-deassert-us = <500>;
144 smsc,disable-energy-detect;
145 interrupt-parent = <&gpioi>;
152 pinctrl-names = "default", "sleep";
153 pinctrl-0 = <&fmc_pins_b>;
154 pinctrl-1 = <&fmc_sleep_pins_b>;
158 compatible = "micrel,ks8851-mll";
160 interrupt-parent = <&gpioc>;
162 bank-width = <2>;
165 st,fmc2-ebi-cs-mux-enable;
166 st,fmc2-ebi-cs-transaction-type = <4>;
167 st,fmc2-ebi-cs-buswidth = <16>;
168 st,fmc2-ebi-cs-address-setup-ns = <5>;
169 st,fmc2-ebi-cs-address-hold-ns = <5>;
170 st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
171 st,fmc2-ebi-cs-data-setup-ns = <45>;
172 st,fmc2-ebi-cs-data-hold-ns = <1>;
173 st,fmc2-ebi-cs-write-address-setup-ns = <5>;
174 st,fmc2-ebi-cs-write-address-hold-ns = <5>;
175 st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
176 st,fmc2-ebi-cs-write-data-setup-ns = <45>;
177 st,fmc2-ebi-cs-write-data-hold-ns = <1>;
182 gpio-line-names = "", "", "", "",
183 "", "", "DHCOM-K", "",
189 gpio-line-names = "", "", "", "",
191 "DHCOM-Q", "", "", "",
196 gpio-line-names = "", "", "", "",
197 "", "", "DHCOM-E", "",
203 gpio-line-names = "", "", "", "",
204 "", "", "DHCOM-B", "",
205 "", "", "", "DHCOM-F",
206 "DHCOM-D", "", "", "";
210 gpio-line-names = "", "", "", "",
211 "", "", "DHCOM-P", "",
217 gpio-line-names = "", "", "", "DHCOM-A",
224 gpio-line-names = "DHCOM-C", "", "", "",
226 "DHCOM-L", "", "", "",
231 gpio-line-names = "", "", "", "",
232 "", "", "", "DHCOM-N",
233 "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
234 "DHCOM-T", "", "DHCOM-S", "";
238 gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
239 "DHCOM-R", "DHCOM-M", "", "",
245 pinctrl-names = "default";
246 pinctrl-0 = <&i2c4_pins_a>;
247 i2c-scl-rising-time-ns = <185>;
248 i2c-scl-falling-time-ns = <20>;
251 /delete-property/dmas;
252 /delete-property/dma-names;
262 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
268 compatible = "st,stpmic1-regulators";
269 ldo1-supply = <&v3v3>;
270 ldo2-supply = <&v3v3>;
271 ldo3-supply = <&vdd_ddr>;
272 ldo5-supply = <&v3v3>;
273 ldo6-supply = <&v3v3>;
274 pwr_sw1-supply = <&bst_out>;
275 pwr_sw2-supply = <&bst_out>;
278 regulator-name = "vddcore";
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <1350000>;
281 regulator-always-on;
282 regulator-initial-mode = <0>;
283 regulator-over-current-protection;
287 regulator-name = "vdd_ddr";
288 regulator-min-microvolt = <1350000>;
289 regulator-max-microvolt = <1350000>;
290 regulator-always-on;
291 regulator-initial-mode = <0>;
292 regulator-over-current-protection;
296 regulator-name = "vdd";
297 regulator-min-microvolt = <3300000>;
298 regulator-max-microvolt = <3300000>;
299 regulator-always-on;
300 st,mask-reset;
301 regulator-initial-mode = <0>;
302 regulator-over-current-protection;
306 regulator-name = "v3v3";
307 regulator-min-microvolt = <3300000>;
308 regulator-max-microvolt = <3300000>;
309 regulator-always-on;
310 regulator-over-current-protection;
311 regulator-initial-mode = <0>;
315 regulator-name = "vdda";
316 regulator-always-on;
317 regulator-min-microvolt = <2900000>;
318 regulator-max-microvolt = <2900000>;
323 regulator-name = "v2v8";
324 regulator-min-microvolt = <2800000>;
325 regulator-max-microvolt = <2800000>;
330 regulator-name = "vtt_ddr";
331 regulator-min-microvolt = <500000>;
332 regulator-max-microvolt = <750000>;
333 regulator-always-on;
334 regulator-over-current-protection;
338 regulator-name = "vdd_usb";
343 regulator-name = "vdd_sd";
344 regulator-min-microvolt = <2900000>;
345 regulator-max-microvolt = <2900000>;
347 regulator-boot-on;
351 regulator-name = "v1v8";
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
358 regulator-name = "vref_ddr";
359 regulator-always-on;
363 regulator-name = "bst_out";
368 regulator-name = "vbus_otg";
373 regulator-name = "vbus_sw";
375 regulator-active-discharge = <1>;
379 onkey {
380 compatible = "st,stpmic1-onkey";
382 interrupt-names = "onkey-falling", "onkey-rising";
383 power-off-time-sec = <10>;
388 compatible = "st,stpmic1-wdt";
396 vio-supply = <&v3v3>;
397 interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
412 timeout-sec = <32>;
417 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
420 mbox-names = "vq0", "vq1", "shutdown", "detach";
421 interrupt-parent = <&exti>;
427 vdd-supply = <&vdd>;
428 vdd_3v3_usbfs-supply = <&vdd_usb>;
432 pinctrl-names = "default", "sleep";
433 pinctrl-0 = <&qspi_clk_pins_a
436 pinctrl-1 = <&qspi_clk_sleep_pins_a
440 #address-cells = <1>;
441 #size-cells = <0>;
445 compatible = "jedec,spi-nor";
447 spi-rx-bus-width = <4>;
448 spi-max-frequency = <108000000>;
449 #address-cells = <1>;
450 #size-cells = <1>;
455 /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
457 clock-names = "ETH_RX_CLK/ETH_REF_CLK";
464 assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
465 assigned-clock-parents = <&rcc PLL4_P>;
466 assigned-clock-rates = <50000000>, <100000000>;
478 pinctrl-names = "default", "opendrain", "sleep", "init";
479 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
480 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
481 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
482 pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
483 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
484 disable-wp;
485 st,sig-dir;
486 st,neg-edge;
487 st,use-ckin;
488 st,cmd-gpios = <&gpiod 2 0>;
489 st,ck-gpios = <&gpioc 12 0>;
490 st,ckin-gpios = <&gpioe 4 0>;
491 bus-width = <4>;
492 vmmc-supply = <&vdd_sd>;
498 * SD bus pull-up resistors:
499 * - optional on SoMs with SD voltage translator
500 * - mandatory on SoMs without SD voltage translator
503 bias-pull-up;
506 bias-pull-up;
511 pinctrl-names = "default", "opendrain", "sleep";
512 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
513 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
514 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
515 non-removable;
516 no-sd;
517 no-sdio;
518 st,neg-edge;
519 bus-width = <8>;
520 vmmc-supply = <&v3v3>;
521 vqmmc-supply = <&v3v3>;
522 mmc-ddr-3_3v;
527 pinctrl-names = "default", "opendrain", "sleep";
528 pinctrl-0 = <&sdmmc3_b4_pins_a>;
529 pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
530 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
531 broken-cd;
532 st,neg-edge;
533 bus-width = <4>;
534 vmmc-supply = <&v3v3>;
535 vqmmc-supply = <&v3v3>;
536 mmc-ddr-3_3v;
541 pinctrl-names = "default";
542 pinctrl-0 = <&uart4_pins_a>;
543 /delete-property/dmas;
544 /delete-property/dma-names;