Lines Matching +full:1 +full:st
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
48 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
49 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
50 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
51 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
114 compatible = "st,stm32mp1-booster";
115 st,syscfg = <&syscfg>;
121 #address-cells = <1>;
122 #size-cells = <1>;
127 compatible = "st,stm32mp1-ipcc";
128 #mbox-cells = <1>;
130 st,proc-id = <0>;
132 <&exti 61 1>,
141 compatible = "st,stm32mp1-rcc", "syscon";
143 #clock-cells = <1>;
144 #reset-cells = <1>;
148 compatible = "st,stm32mp1,pwr-reg";
171 compatible = "st,stm32mp151-pwr-mcu", "syscon";
176 compatible = "st,stm32mp1-exti", "syscon";
197 <&intc GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
258 compatible = "st,stm32mp157-syscfg", "syscon";
264 compatible = "st,stm32-thermal";
274 compatible = "st,stm32h7-mdma";
285 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
299 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
313 compatible = "st,stm32f7-crc";
343 compatible = "st,stm32-ltdc";
354 compatible = "st,stm32mp1-iwdg";
362 #address-cells = <1>;
365 compatible = "st,stm32mp1-usbphyc";
378 usbphyc_port1: usb-phy@1 {
379 #phy-cells = <1>;
380 reg = <1>;
385 compatible = "st,stm32mp1-rtc";
394 compatible = "st,stm32mp15-bsec";
396 #address-cells = <1>;
397 #size-cells = <1>;
413 compatible = "st,stm32-etzpc", "simple-bus";
415 #address-cells = <1>;
416 #size-cells = <1>;
417 #access-controller-cells = <1>;
421 #address-cells = <1>;
423 compatible = "st,stm32-timers";
439 compatible = "st,stm32-pwm";
444 timer@1 {
445 compatible = "st,stm32h7-timer-trigger";
446 reg = <1>;
451 compatible = "st,stm32-timer-counter";
457 #address-cells = <1>;
459 compatible = "st,stm32-timers";
476 compatible = "st,stm32-pwm";
482 compatible = "st,stm32h7-timer-trigger";
488 compatible = "st,stm32-timer-counter";
494 #address-cells = <1>;
496 compatible = "st,stm32-timers";
511 compatible = "st,stm32-pwm";
517 compatible = "st,stm32h7-timer-trigger";
523 compatible = "st,stm32-timer-counter";
529 #address-cells = <1>;
531 compatible = "st,stm32-timers";
548 compatible = "st,stm32-pwm";
554 compatible = "st,stm32h7-timer-trigger";
560 compatible = "st,stm32-timer-counter";
566 #address-cells = <1>;
568 compatible = "st,stm32-timers";
580 compatible = "st,stm32h7-timer-trigger";
587 #address-cells = <1>;
589 compatible = "st,stm32-timers";
601 compatible = "st,stm32h7-timer-trigger";
608 #address-cells = <1>;
610 compatible = "st,stm32-timers";
620 compatible = "st,stm32-pwm";
626 compatible = "st,stm32h7-timer-trigger";
633 #address-cells = <1>;
635 compatible = "st,stm32-timers";
645 compatible = "st,stm32-pwm";
651 compatible = "st,stm32h7-timer-trigger";
658 #address-cells = <1>;
660 compatible = "st,stm32-timers";
670 compatible = "st,stm32-pwm";
676 compatible = "st,stm32h7-timer-trigger";
683 #address-cells = <1>;
685 compatible = "st,stm32-lptimer";
695 compatible = "st,stm32-pwm-lp";
701 compatible = "st,stm32-lptimer-trigger";
707 compatible = "st,stm32-lptimer-counter";
713 compatible = "st,stm32h7-i2s";
725 #address-cells = <1>;
727 compatible = "st,stm32h7-spi";
740 compatible = "st,stm32h7-i2s";
752 #address-cells = <1>;
754 compatible = "st,stm32h7-spi";
767 compatible = "st,stm32h7-spdifrx";
781 compatible = "st,stm32h7-uart";
794 compatible = "st,stm32h7-uart";
807 compatible = "st,stm32h7-uart";
820 compatible = "st,stm32h7-uart";
833 compatible = "st,stm32mp15-i2c";
840 #address-cells = <1>;
842 st,syscfg-fmp = <&syscfg 0x4 0x1>;
850 compatible = "st,stm32mp15-i2c";
857 #address-cells = <1>;
859 st,syscfg-fmp = <&syscfg 0x4 0x2>;
867 compatible = "st,stm32mp15-i2c";
874 #address-cells = <1>;
876 st,syscfg-fmp = <&syscfg 0x4 0x4>;
884 compatible = "st,stm32mp15-i2c";
891 #address-cells = <1>;
893 st,syscfg-fmp = <&syscfg 0x4 0x10>;
901 compatible = "st,stm32-cec";
911 compatible = "st,stm32h7-dac-core";
915 #address-cells = <1>;
920 dac1: dac@1 {
921 compatible = "st,stm32-dac";
922 #io-channel-cells = <1>;
923 reg = <1>;
928 compatible = "st,stm32-dac";
929 #io-channel-cells = <1>;
936 compatible = "st,stm32h7-uart";
949 compatible = "st,stm32h7-uart";
962 #address-cells = <1>;
964 compatible = "st,stm32-timers";
986 compatible = "st,stm32-pwm";
992 compatible = "st,stm32h7-timer-trigger";
998 compatible = "st,stm32-timer-counter";
1004 #address-cells = <1>;
1006 compatible = "st,stm32-timers";
1028 compatible = "st,stm32-pwm";
1034 compatible = "st,stm32h7-timer-trigger";
1040 compatible = "st,stm32-timer-counter";
1046 compatible = "st,stm32h7-uart";
1059 compatible = "st,stm32h7-i2s";
1071 #address-cells = <1>;
1073 compatible = "st,stm32h7-spi";
1086 #address-cells = <1>;
1088 compatible = "st,stm32h7-spi";
1101 #address-cells = <1>;
1103 compatible = "st,stm32-timers";
1118 compatible = "st,stm32-pwm";
1124 compatible = "st,stm32h7-timer-trigger";
1131 #address-cells = <1>;
1133 compatible = "st,stm32-timers";
1146 compatible = "st,stm32-pwm";
1151 compatible = "st,stm32h7-timer-trigger";
1158 #address-cells = <1>;
1160 compatible = "st,stm32-timers";
1173 compatible = "st,stm32-pwm";
1179 compatible = "st,stm32h7-timer-trigger";
1186 #address-cells = <1>;
1188 compatible = "st,stm32h7-spi";
1201 compatible = "st,stm32h7-sai";
1202 #address-cells = <1>;
1203 #size-cells = <1>;
1214 compatible = "st,stm32-sai-sub-a";
1224 compatible = "st,stm32-sai-sub-b";
1234 compatible = "st,stm32h7-sai";
1235 #address-cells = <1>;
1236 #size-cells = <1>;
1246 compatible = "st,stm32-sai-sub-a";
1256 compatible = "st,stm32-sai-sub-b";
1266 compatible = "st,stm32h7-sai";
1267 #address-cells = <1>;
1268 #size-cells = <1>;
1278 compatible = "st,stm32-sai-sub-a";
1288 compatible = "st,stm32-sai-sub-b";
1298 compatible = "st,stm32mp1-dfsdm";
1302 #address-cells = <1>;
1308 compatible = "st,stm32-dfsdm-adc";
1309 #io-channel-cells = <1>;
1317 dfsdm1: filter@1 {
1318 compatible = "st,stm32-dfsdm-adc";
1319 #io-channel-cells = <1>;
1320 reg = <1>;
1328 compatible = "st,stm32-dfsdm-adc";
1329 #io-channel-cells = <1>;
1338 compatible = "st,stm32-dfsdm-adc";
1339 #io-channel-cells = <1>;
1348 compatible = "st,stm32-dfsdm-adc";
1349 #io-channel-cells = <1>;
1358 compatible = "st,stm32-dfsdm-adc";
1359 #io-channel-cells = <1>;
1369 compatible = "st,stm32-dma";
1382 st,mem2mem;
1388 compatible = "st,stm32-dma";
1401 st,mem2mem;
1407 compatible = "st,stm32h7-dmamux";
1419 compatible = "st,stm32mp1-adc-core";
1426 st,syscfg = <&syscfg>;
1427 #interrupt-cells = <1>;
1428 #address-cells = <1>;
1434 compatible = "st,stm32mp1-adc";
1435 #io-channel-cells = <1>;
1436 #address-cells = <1>;
1447 compatible = "st,stm32mp1-adc";
1448 #io-channel-cells = <1>;
1449 #address-cells = <1>;
1453 interrupts = <1>;
1471 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1486 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1504 compatible = "st,stm32-dcmi";
1517 #address-cells = <1>;
1519 compatible = "st,stm32-lptimer";
1529 compatible = "st,stm32-pwm-lp";
1534 trigger@1 {
1535 compatible = "st,stm32-lptimer-trigger";
1536 reg = <1>;
1541 compatible = "st,stm32-lptimer-counter";
1547 #address-cells = <1>;
1549 compatible = "st,stm32-lptimer";
1559 compatible = "st,stm32-pwm-lp";
1565 compatible = "st,stm32-lptimer-trigger";
1572 compatible = "st,stm32-lptimer";
1582 compatible = "st,stm32-pwm-lp";
1589 compatible = "st,stm32-lptimer";
1599 compatible = "st,stm32-pwm-lp";
1606 compatible = "st,stm32-vrefbuf";
1616 compatible = "st,stm32h7-sai";
1617 #address-cells = <1>;
1618 #size-cells = <1>;
1628 compatible = "st,stm32-sai-sub-a";
1638 compatible = "st,stm32-sai-sub-b";
1648 compatible = "st,stm32f756-hash";
1661 compatible = "st,stm32-rng";
1671 #size-cells = <1>;
1672 compatible = "st,stm32mp1-fmc2-ebi";
1679 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
1680 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
1686 #address-cells = <1>;
1688 compatible = "st,stm32mp1-fmc2-nfc";
1705 compatible = "st,stm32f469-qspi";
1714 #address-cells = <1>;
1721 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1738 st,syscon = <&syscfg 0x4>;
1755 compatible = "st,stm32h7-uart";
1765 #address-cells = <1>;
1767 compatible = "st,stm32h7-spi";
1780 compatible = "st,stm32mp15-i2c";
1787 #address-cells = <1>;
1789 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1797 compatible = "st,stm32mp15-i2c";
1804 #address-cells = <1>;
1806 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1815 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1824 #address-cells = <1>;
1825 #size-cells = <1>;
1826 compatible = "st,stm32mp157-pinctrl";
1829 st,syscfg = <&exti 0x60 0xff>;
1838 st,bank-name = "GPIOA";
1849 st,bank-name = "GPIOB";
1860 st,bank-name = "GPIOC";
1871 st,bank-name = "GPIOD";
1882 st,bank-name = "GPIOE";
1893 st,bank-name = "GPIOF";
1904 st,bank-name = "GPIOG";
1915 st,bank-name = "GPIOH";
1926 st,bank-name = "GPIOI";
1937 st,bank-name = "GPIOJ";
1948 st,bank-name = "GPIOK";
1954 #address-cells = <1>;
1955 #size-cells = <1>;
1956 compatible = "st,stm32mp157-z-pinctrl";
1959 st,syscfg = <&exti 0x60 0xff>;
1968 st,bank-name = "GPIOZ";
1969 st,bank-ioport = <11>;
1976 compatible = "st,mlahb", "simple-bus";
1977 #address-cells = <1>;
1978 #size-cells = <1>;
1985 compatible = "st,stm32mp1-m4";
1991 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1992 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
1993 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
1994 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;