Lines Matching +full:- +full:pinmux
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_ain_pins_a: adc1-ain-0 {
12 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
21 /omit-if-no-ref/
22 adc1_in6_pins_a: adc1-in6-0 {
24 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
28 /omit-if-no-ref/
29 adc12_ain_pins_a: adc12-ain-0 {
31 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
38 /omit-if-no-ref/
39 adc12_ain_pins_b: adc12-ain-1 {
41 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
46 /omit-if-no-ref/
47 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
49 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
54 /omit-if-no-ref/
55 cec_pins_a: cec-0 {
57 pinmux = <STM32_PINMUX('A', 15, AF4)>;
58 bias-disable;
59 drive-open-drain;
60 slew-rate = <0>;
64 /omit-if-no-ref/
65 cec_sleep_pins_a: cec-sleep-0 {
67 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
71 /omit-if-no-ref/
72 cec_pins_b: cec-1 {
74 pinmux = <STM32_PINMUX('B', 6, AF5)>;
75 bias-disable;
76 drive-open-drain;
77 slew-rate = <0>;
81 /omit-if-no-ref/
82 cec_sleep_pins_b: cec-sleep-1 {
84 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
88 /omit-if-no-ref/
89 dac_ch1_pins_a: dac-ch1-0 {
91 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
95 /omit-if-no-ref/
96 dac_ch2_pins_a: dac-ch2-0 {
98 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
102 /omit-if-no-ref/
103 dcmi_pins_a: dcmi-0 {
105 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
120 bias-disable;
124 /omit-if-no-ref/
125 dcmi_sleep_pins_a: dcmi-sleep-0 {
127 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
145 /omit-if-no-ref/
146 dcmi_pins_b: dcmi-1 {
148 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
159 bias-disable;
163 /omit-if-no-ref/
164 dcmi_sleep_pins_b: dcmi-sleep-1 {
166 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
180 /omit-if-no-ref/
181 dcmi_pins_c: dcmi-2 {
183 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
196 bias-pull-up;
200 /omit-if-no-ref/
201 dcmi_sleep_pins_c: dcmi-sleep-2 {
203 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
219 /omit-if-no-ref/
220 ethernet0_rgmii_pins_a: rgmii-0 {
222 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <2>;
235 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
236 bias-disable;
237 drive-push-pull;
238 slew-rate = <0>;
241 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
247 bias-disable;
251 /omit-if-no-ref/
252 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
254 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
272 /omit-if-no-ref/
273 ethernet0_rgmii_pins_b: rgmii-1 {
275 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
283 bias-disable;
284 drive-push-pull;
285 slew-rate = <2>;
288 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
289 bias-disable;
290 drive-push-pull;
291 slew-rate = <0>;
294 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
300 bias-disable;
304 /omit-if-no-ref/
305 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
307 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
325 /omit-if-no-ref/
326 ethernet0_rgmii_pins_c: rgmii-2 {
328 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
336 bias-disable;
337 drive-push-pull;
338 slew-rate = <2>;
341 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
342 bias-disable;
343 drive-push-pull;
344 slew-rate = <0>;
347 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
353 bias-disable;
357 /omit-if-no-ref/
358 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
360 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
378 /omit-if-no-ref/
379 ethernet0_rgmii_pins_d: rgmii-3 {
381 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
388 bias-disable;
389 drive-push-pull;
390 slew-rate = <2>;
393 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
394 bias-disable;
395 drive-push-pull;
396 slew-rate = <0>;
399 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
405 bias-disable;
409 /omit-if-no-ref/
410 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
412 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
430 /omit-if-no-ref/
431 ethernet0_rgmii_pins_e: rgmii-4 {
433 pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
439 bias-disable;
440 drive-push-pull;
441 slew-rate = <2>;
444 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
450 bias-disable;
454 /omit-if-no-ref/
455 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
457 pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
472 /omit-if-no-ref/
473 ethernet0_rmii_pins_a: rmii-0 {
475 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
481 bias-disable;
482 drive-push-pull;
483 slew-rate = <2>;
486 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
489 bias-disable;
493 /omit-if-no-ref/
494 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
496 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
508 /omit-if-no-ref/
509 ethernet0_rmii_pins_b: rmii-1 {
511 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
515 bias-disable;
516 drive-push-pull;
517 slew-rate = <1>;
520 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
521 bias-disable;
522 drive-push-pull;
523 slew-rate = <0>;
526 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
529 bias-disable;
532 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
536 /omit-if-no-ref/
537 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
539 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
551 /omit-if-no-ref/
552 ethernet0_rmii_pins_c: rmii-2 {
554 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
560 bias-disable;
561 drive-push-pull;
562 slew-rate = <2>;
565 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
568 bias-disable;
572 /omit-if-no-ref/
573 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
575 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
587 /omit-if-no-ref/
588 fmc_pins_a: fmc-0 {
590 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
603 bias-disable;
604 drive-push-pull;
605 slew-rate = <1>;
608 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
609 bias-pull-up;
613 /omit-if-no-ref/
614 fmc_sleep_pins_a: fmc-sleep-0 {
616 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
633 /omit-if-no-ref/
634 fmc_pins_b: fmc-1 {
636 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
657 bias-disable;
658 drive-push-pull;
659 slew-rate = <3>;
663 /omit-if-no-ref/
664 fmc_sleep_pins_b: fmc-sleep-1 {
666 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
690 /omit-if-no-ref/
691 i2c1_pins_a: i2c1-0 {
693 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
695 bias-disable;
696 drive-open-drain;
697 slew-rate = <0>;
701 /omit-if-no-ref/
702 i2c1_sleep_pins_a: i2c1-sleep-0 {
704 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
709 /omit-if-no-ref/
710 i2c1_pins_b: i2c1-1 {
712 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
714 bias-disable;
715 drive-open-drain;
716 slew-rate = <0>;
720 /omit-if-no-ref/
721 i2c1_sleep_pins_b: i2c1-sleep-1 {
723 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
728 /omit-if-no-ref/
729 i2c2_pins_a: i2c2-0 {
731 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
733 bias-disable;
734 drive-open-drain;
735 slew-rate = <0>;
739 /omit-if-no-ref/
740 i2c2_sleep_pins_a: i2c2-sleep-0 {
742 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
747 /omit-if-no-ref/
748 i2c2_pins_b1: i2c2-1 {
750 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
751 bias-disable;
752 drive-open-drain;
753 slew-rate = <0>;
757 /omit-if-no-ref/
758 i2c2_sleep_pins_b1: i2c2-sleep-1 {
760 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
764 /omit-if-no-ref/
765 i2c2_pins_c: i2c2-2 {
767 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
769 bias-disable;
770 drive-open-drain;
771 slew-rate = <0>;
775 /omit-if-no-ref/
776 i2c2_pins_sleep_c: i2c2-sleep-2 {
778 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
783 /omit-if-no-ref/
784 i2c5_pins_a: i2c5-0 {
786 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
788 bias-disable;
789 drive-open-drain;
790 slew-rate = <0>;
794 /omit-if-no-ref/
795 i2c5_sleep_pins_a: i2c5-sleep-0 {
797 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
803 /omit-if-no-ref/
804 i2c5_pins_b: i2c5-1 {
806 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
808 bias-disable;
809 drive-open-drain;
810 slew-rate = <0>;
814 /omit-if-no-ref/
815 i2c5_sleep_pins_b: i2c5-sleep-1 {
817 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
822 /omit-if-no-ref/
823 i2s2_pins_a: i2s2-0 {
825 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
828 slew-rate = <1>;
829 drive-push-pull;
830 bias-disable;
834 /omit-if-no-ref/
835 i2s2_sleep_pins_a: i2s2-sleep-0 {
837 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
843 /omit-if-no-ref/
844 i2s2_pins_b: i2s2-1 {
846 pinmux = <STM32_PINMUX('C', 3, AF5)>, /* I2S2_SDO */
849 bias-disable;
850 drive-push-pull;
851 slew-rate = <1>;
855 /omit-if-no-ref/
856 i2s2_sleep_pins_b: i2s2-sleep-1 {
858 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* I2S2_SDO */
864 /omit-if-no-ref/
865 ltdc_pins_a: ltdc-0 {
867 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
895 bias-disable;
896 drive-push-pull;
897 slew-rate = <1>;
901 /omit-if-no-ref/
902 ltdc_sleep_pins_a: ltdc-sleep-0 {
904 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
935 /omit-if-no-ref/
936 ltdc_pins_b: ltdc-1 {
938 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
966 bias-disable;
967 drive-push-pull;
968 slew-rate = <1>;
972 /omit-if-no-ref/
973 ltdc_sleep_pins_b: ltdc-sleep-1 {
975 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
1006 /omit-if-no-ref/
1007 ltdc_pins_c: ltdc-2 {
1009 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
1030 bias-disable;
1031 drive-push-pull;
1032 slew-rate = <0>;
1035 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
1036 bias-disable;
1037 drive-push-pull;
1038 slew-rate = <1>;
1042 /omit-if-no-ref/
1043 ltdc_sleep_pins_c: ltdc-sleep-2 {
1045 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
1070 /omit-if-no-ref/
1071 ltdc_pins_d: ltdc-3 {
1073 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
1074 bias-disable;
1075 drive-push-pull;
1076 slew-rate = <3>;
1079 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
1106 bias-disable;
1107 drive-push-pull;
1108 slew-rate = <2>;
1112 /omit-if-no-ref/
1113 ltdc_sleep_pins_d: ltdc-sleep-3 {
1115 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
1146 /omit-if-no-ref/
1147 ltdc_pins_e: ltdc-4 {
1149 pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
1176 bias-disable;
1177 drive-push-pull;
1178 slew-rate = <0>;
1182 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */
1183 bias-disable;
1184 drive-push-pull;
1185 slew-rate = <1>;
1189 /omit-if-no-ref/
1190 ltdc_sleep_pins_e: ltdc-sleep-4 {
1192 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */
1223 /omit-if-no-ref/
1224 mco1_pins_a: mco1-0 {
1226 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
1227 bias-disable;
1228 drive-push-pull;
1229 slew-rate = <1>;
1233 /omit-if-no-ref/
1234 mco1_sleep_pins_a: mco1-sleep-0 {
1236 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
1240 /omit-if-no-ref/
1241 mco2_pins_a: mco2-0 {
1243 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
1244 bias-disable;
1245 drive-push-pull;
1246 slew-rate = <2>;
1250 /omit-if-no-ref/
1251 mco2_sleep_pins_a: mco2-sleep-0 {
1253 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
1257 /omit-if-no-ref/
1258 m_can1_pins_a: m-can1-0 {
1260 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1261 slew-rate = <1>;
1262 drive-push-pull;
1263 bias-disable;
1266 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
1267 bias-disable;
1271 /omit-if-no-ref/
1272 m_can1_sleep_pins_a: m_can1-sleep-0 {
1274 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1279 /omit-if-no-ref/
1280 m_can1_pins_b: m-can1-1 {
1282 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
1283 slew-rate = <1>;
1284 drive-push-pull;
1285 bias-disable;
1288 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
1289 bias-disable;
1293 /omit-if-no-ref/
1294 m_can1_sleep_pins_b: m_can1-sleep-1 {
1296 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
1301 /omit-if-no-ref/
1302 m_can1_pins_c: m-can1-2 {
1304 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1305 slew-rate = <1>;
1306 drive-push-pull;
1307 bias-disable;
1310 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
1311 bias-disable;
1315 /omit-if-no-ref/
1316 m_can1_sleep_pins_c: m_can1-sleep-2 {
1318 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1323 /omit-if-no-ref/
1324 m_can1_pins_d: m-can1-3 {
1326 pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
1327 slew-rate = <1>;
1328 drive-push-pull;
1329 bias-disable;
1332 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
1333 bias-disable;
1337 /omit-if-no-ref/
1338 m_can1_sleep_pins_d: m_can1-sleep-3 {
1340 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* CAN1_TX */
1345 /omit-if-no-ref/
1346 m_can2_pins_a: m-can2-0 {
1348 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1349 slew-rate = <1>;
1350 drive-push-pull;
1351 bias-disable;
1354 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1355 bias-disable;
1359 /omit-if-no-ref/
1360 m_can2_sleep_pins_a: m_can2-sleep-0 {
1362 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1367 /omit-if-no-ref/
1368 pwm1_pins_a: pwm1-0 {
1370 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1373 bias-pull-down;
1374 drive-push-pull;
1375 slew-rate = <0>;
1379 /omit-if-no-ref/
1380 pwm1_sleep_pins_a: pwm1-sleep-0 {
1382 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1388 /omit-if-no-ref/
1389 pwm1_pins_b: pwm1-1 {
1391 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1392 bias-pull-down;
1393 drive-push-pull;
1394 slew-rate = <0>;
1398 /omit-if-no-ref/
1399 pwm1_sleep_pins_b: pwm1-sleep-1 {
1401 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1405 /omit-if-no-ref/
1406 pwm1_pins_c: pwm1-2 {
1408 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
1409 drive-push-pull;
1410 slew-rate = <0>;
1414 /omit-if-no-ref/
1415 pwm1_sleep_pins_c: pwm1-sleep-2 {
1417 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
1421 /omit-if-no-ref/
1422 pwm2_pins_a: pwm2-0 {
1424 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1425 bias-pull-down;
1426 drive-push-pull;
1427 slew-rate = <0>;
1431 /omit-if-no-ref/
1432 pwm2_sleep_pins_a: pwm2-sleep-0 {
1434 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1438 /omit-if-no-ref/
1439 pwm3_pins_a: pwm3-0 {
1441 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1442 bias-pull-down;
1443 drive-push-pull;
1444 slew-rate = <0>;
1448 /omit-if-no-ref/
1449 pwm3_sleep_pins_a: pwm3-sleep-0 {
1451 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1455 /omit-if-no-ref/
1456 pwm3_pins_b: pwm3-1 {
1458 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1459 bias-disable;
1460 drive-push-pull;
1461 slew-rate = <0>;
1465 /omit-if-no-ref/
1466 pwm3_sleep_pins_b: pwm3-sleep-1 {
1468 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1472 /omit-if-no-ref/
1473 pwm4_pins_a: pwm4-0 {
1475 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1477 bias-pull-down;
1478 drive-push-pull;
1479 slew-rate = <0>;
1483 /omit-if-no-ref/
1484 pwm4_sleep_pins_a: pwm4-sleep-0 {
1486 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1491 /omit-if-no-ref/
1492 pwm4_pins_b: pwm4-1 {
1494 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1495 bias-pull-down;
1496 drive-push-pull;
1497 slew-rate = <0>;
1501 /omit-if-no-ref/
1502 pwm4_sleep_pins_b: pwm4-sleep-1 {
1504 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1508 /omit-if-no-ref/
1509 pwm5_pins_a: pwm5-0 {
1511 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1512 bias-pull-down;
1513 drive-push-pull;
1514 slew-rate = <0>;
1518 /omit-if-no-ref/
1519 pwm5_sleep_pins_a: pwm5-sleep-0 {
1521 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1525 /omit-if-no-ref/
1526 pwm5_pins_b: pwm5-1 {
1528 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1531 bias-disable;
1532 drive-push-pull;
1533 slew-rate = <0>;
1537 /omit-if-no-ref/
1538 pwm5_sleep_pins_b: pwm5-sleep-1 {
1540 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1546 /omit-if-no-ref/
1547 pwm8_pins_a: pwm8-0 {
1549 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1550 bias-pull-down;
1551 drive-push-pull;
1552 slew-rate = <0>;
1556 /omit-if-no-ref/
1557 pwm8_sleep_pins_a: pwm8-sleep-0 {
1559 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1563 /omit-if-no-ref/
1564 pwm8_pins_b: pwm8-1 {
1566 pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
1570 drive-push-pull;
1571 slew-rate = <0>;
1575 /omit-if-no-ref/
1576 pwm8_sleep_pins_b: pwm8-sleep-1 {
1578 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
1585 /omit-if-no-ref/
1586 pwm12_pins_a: pwm12-0 {
1588 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1589 bias-pull-down;
1590 drive-push-pull;
1591 slew-rate = <0>;
1595 /omit-if-no-ref/
1596 pwm12_sleep_pins_a: pwm12-sleep-0 {
1598 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1602 /omit-if-no-ref/
1603 qspi_clk_pins_a: qspi-clk-0 {
1605 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1606 bias-disable;
1607 drive-push-pull;
1608 slew-rate = <3>;
1612 /omit-if-no-ref/
1613 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1615 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1619 /omit-if-no-ref/
1620 qspi_bk1_pins_a: qspi-bk1-0 {
1622 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1626 bias-disable;
1627 drive-push-pull;
1628 slew-rate = <1>;
1632 /omit-if-no-ref/
1633 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1635 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1642 /omit-if-no-ref/
1643 qspi_bk2_pins_a: qspi-bk2-0 {
1645 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1649 bias-disable;
1650 drive-push-pull;
1651 slew-rate = <1>;
1655 /omit-if-no-ref/
1656 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1658 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1665 /omit-if-no-ref/
1666 qspi_cs1_pins_a: qspi-cs1-0 {
1668 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1669 bias-pull-up;
1670 drive-push-pull;
1671 slew-rate = <1>;
1675 /omit-if-no-ref/
1676 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
1678 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1682 /omit-if-no-ref/
1683 qspi_cs2_pins_a: qspi-cs2-0 {
1685 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1686 bias-pull-up;
1687 drive-push-pull;
1688 slew-rate = <1>;
1692 /omit-if-no-ref/
1693 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
1695 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1699 /omit-if-no-ref/
1700 sai2a_pins_a: sai2a-0 {
1702 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1706 slew-rate = <0>;
1707 drive-push-pull;
1708 bias-disable;
1712 /omit-if-no-ref/
1713 sai2a_sleep_pins_a: sai2a-sleep-0 {
1715 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1722 /omit-if-no-ref/
1723 sai2a_pins_b: sai2a-1 {
1725 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1728 slew-rate = <0>;
1729 drive-push-pull;
1730 bias-disable;
1734 /omit-if-no-ref/
1735 sai2a_sleep_pins_b: sai2a-sleep-1 {
1737 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1743 /omit-if-no-ref/
1744 sai2a_pins_c: sai2a-2 {
1746 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1749 slew-rate = <0>;
1750 drive-push-pull;
1751 bias-disable;
1755 /omit-if-no-ref/
1756 sai2a_sleep_pins_c: sai2a-sleep-2 {
1758 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1764 /omit-if-no-ref/
1765 sai2b_pins_a: sai2b-0 {
1767 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1770 slew-rate = <0>;
1771 drive-push-pull;
1772 bias-disable;
1775 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1776 bias-disable;
1780 /omit-if-no-ref/
1781 sai2b_sleep_pins_a: sai2b-sleep-0 {
1783 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1790 /omit-if-no-ref/
1791 sai2b_pins_b: sai2b-1 {
1793 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1794 bias-disable;
1798 /omit-if-no-ref/
1799 sai2b_sleep_pins_b: sai2b-sleep-1 {
1801 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1805 /omit-if-no-ref/
1806 sai2b_pins_c: sai2b-2 {
1808 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1809 bias-disable;
1813 /omit-if-no-ref/
1814 sai2b_sleep_pins_c: sai2b-sleep-2 {
1816 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1820 /omit-if-no-ref/
1821 sai2b_pins_d: sai2b-3 {
1823 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
1826 slew-rate = <0>;
1827 drive-push-pull;
1828 bias-disable;
1831 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1832 bias-disable;
1836 /omit-if-no-ref/
1837 sai2b_sleep_pins_d: sai2b-sleep-3 {
1839 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
1846 /omit-if-no-ref/
1847 sai4a_pins_a: sai4a-0 {
1849 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1850 slew-rate = <0>;
1851 drive-push-pull;
1852 bias-disable;
1856 /omit-if-no-ref/
1857 sai4a_sleep_pins_a: sai4a-sleep-0 {
1859 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1863 /omit-if-no-ref/
1864 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1866 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1871 slew-rate = <1>;
1872 drive-push-pull;
1873 bias-disable;
1876 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1877 slew-rate = <2>;
1878 drive-push-pull;
1879 bias-disable;
1883 /omit-if-no-ref/
1884 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1886 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1890 slew-rate = <1>;
1891 drive-push-pull;
1892 bias-disable;
1895 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1896 slew-rate = <2>;
1897 drive-push-pull;
1898 bias-disable;
1901 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1902 slew-rate = <1>;
1903 drive-open-drain;
1904 bias-disable;
1908 /omit-if-no-ref/
1909 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1911 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1915 slew-rate = <1>;
1916 drive-push-pull;
1917 bias-disable;
1921 /omit-if-no-ref/
1922 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1924 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1933 /omit-if-no-ref/
1934 sdmmc1_b4_pins_b: sdmmc1-b4-1 {
1936 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1941 slew-rate = <1>;
1942 drive-push-pull;
1943 bias-disable;
1946 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1947 slew-rate = <2>;
1948 drive-push-pull;
1949 bias-disable;
1953 /omit-if-no-ref/
1954 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
1956 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1960 slew-rate = <1>;
1961 drive-push-pull;
1962 bias-disable;
1965 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1966 slew-rate = <2>;
1967 drive-push-pull;
1968 bias-disable;
1971 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1972 slew-rate = <1>;
1973 drive-open-drain;
1974 bias-disable;
1978 /omit-if-no-ref/
1979 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
1981 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1990 /omit-if-no-ref/
1991 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1993 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1996 slew-rate = <1>;
1997 drive-push-pull;
1998 bias-pull-up;
2001 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2002 bias-pull-up;
2006 /omit-if-no-ref/
2007 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
2009 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2012 slew-rate = <1>;
2013 drive-push-pull;
2014 bias-pull-up;
2018 /omit-if-no-ref/
2019 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
2021 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2028 /omit-if-no-ref/
2029 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
2031 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
2034 slew-rate = <1>;
2035 drive-push-pull;
2036 bias-pull-up;
2039 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
2040 bias-pull-up;
2044 /omit-if-no-ref/
2045 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
2047 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
2054 /omit-if-no-ref/
2055 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
2057 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2062 slew-rate = <1>;
2063 drive-push-pull;
2064 bias-pull-up;
2067 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2068 slew-rate = <2>;
2069 drive-push-pull;
2070 bias-pull-up;
2074 /omit-if-no-ref/
2075 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
2077 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2081 slew-rate = <1>;
2082 drive-push-pull;
2083 bias-pull-up;
2086 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2087 slew-rate = <2>;
2088 drive-push-pull;
2089 bias-pull-up;
2092 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2093 slew-rate = <1>;
2094 drive-open-drain;
2095 bias-pull-up;
2099 /omit-if-no-ref/
2100 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
2102 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
2111 /omit-if-no-ref/
2112 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
2114 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2119 slew-rate = <1>;
2120 drive-push-pull;
2121 bias-disable;
2124 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2125 slew-rate = <2>;
2126 drive-push-pull;
2127 bias-disable;
2131 /omit-if-no-ref/
2132 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
2134 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
2138 slew-rate = <1>;
2139 drive-push-pull;
2140 bias-disable;
2143 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
2144 slew-rate = <2>;
2145 drive-push-pull;
2146 bias-disable;
2149 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
2150 slew-rate = <1>;
2151 drive-open-drain;
2152 bias-disable;
2156 /omit-if-no-ref/
2157 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
2159 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2163 slew-rate = <1>;
2164 drive-push-pull;
2165 bias-pull-up;
2169 /omit-if-no-ref/
2170 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
2172 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2179 /omit-if-no-ref/
2180 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
2182 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2186 slew-rate = <1>;
2187 drive-push-pull;
2188 bias-disable;
2192 /omit-if-no-ref/
2193 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
2195 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2202 /omit-if-no-ref/
2203 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
2205 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2209 slew-rate = <1>;
2210 drive-push-pull;
2211 bias-pull-up;
2215 /omit-if-no-ref/
2216 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
2218 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2225 /omit-if-no-ref/
2226 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
2228 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2232 slew-rate = <1>;
2233 drive-push-pull;
2234 bias-pull-up;
2238 /omit-if-no-ref/
2239 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
2241 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2248 /omit-if-no-ref/
2249 sdmmc2_d47_pins_e: sdmmc2-d47-4 {
2251 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
2255 slew-rate = <1>;
2256 drive-push-pull;
2257 bias-pull-up;
2261 /omit-if-no-ref/
2262 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
2264 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
2271 /omit-if-no-ref/
2272 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
2274 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2279 slew-rate = <1>;
2280 drive-push-pull;
2281 bias-pull-up;
2284 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2285 slew-rate = <2>;
2286 drive-push-pull;
2287 bias-pull-up;
2291 /omit-if-no-ref/
2292 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
2294 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2298 slew-rate = <1>;
2299 drive-push-pull;
2300 bias-pull-up;
2303 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2304 slew-rate = <2>;
2305 drive-push-pull;
2306 bias-pull-up;
2309 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
2310 slew-rate = <1>;
2311 drive-open-drain;
2312 bias-pull-up;
2316 /omit-if-no-ref/
2317 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
2319 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2328 /omit-if-no-ref/
2329 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
2331 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2336 slew-rate = <1>;
2337 drive-push-pull;
2338 bias-pull-up;
2341 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2342 slew-rate = <2>;
2343 drive-push-pull;
2344 bias-pull-up;
2348 /omit-if-no-ref/
2349 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
2351 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2355 slew-rate = <1>;
2356 drive-push-pull;
2357 bias-pull-up;
2360 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2361 slew-rate = <2>;
2362 drive-push-pull;
2363 bias-pull-up;
2366 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
2367 slew-rate = <1>;
2368 drive-open-drain;
2369 bias-pull-up;
2373 /omit-if-no-ref/
2374 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
2376 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2385 /omit-if-no-ref/
2386 spdifrx_pins_a: spdifrx-0 {
2388 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
2389 bias-disable;
2393 /omit-if-no-ref/
2394 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
2396 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
2400 /omit-if-no-ref/
2401 spi1_pins_b: spi1-1 {
2403 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2405 bias-disable;
2406 drive-push-pull;
2407 slew-rate = <1>;
2411 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2412 bias-disable;
2416 /omit-if-no-ref/
2417 spi2_pins_a: spi2-0 {
2419 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
2421 bias-disable;
2422 drive-push-pull;
2423 slew-rate = <1>;
2427 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2428 bias-disable;
2432 /omit-if-no-ref/
2433 spi2_pins_b: spi2-1 {
2435 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2437 bias-disable;
2438 drive-push-pull;
2439 slew-rate = <1>;
2443 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2444 bias-disable;
2448 /omit-if-no-ref/
2449 spi2_pins_c: spi2-2 {
2451 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2453 bias-disable;
2454 drive-push-pull;
2458 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2459 bias-pull-down;
2463 /omit-if-no-ref/
2464 spi4_pins_a: spi4-0 {
2466 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
2468 bias-disable;
2469 drive-push-pull;
2470 slew-rate = <1>;
2473 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
2474 bias-disable;
2478 /omit-if-no-ref/
2479 spi5_pins_a: spi5-0 {
2481 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
2483 bias-disable;
2484 drive-push-pull;
2485 slew-rate = <1>;
2489 pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
2490 bias-disable;
2494 /omit-if-no-ref/
2495 stusb1600_pins_a: stusb1600-0 {
2497 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
2498 bias-pull-up;
2502 /omit-if-no-ref/
2503 uart4_pins_a: uart4-0 {
2505 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2506 bias-disable;
2507 drive-push-pull;
2508 slew-rate = <0>;
2511 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2512 bias-disable;
2516 /omit-if-no-ref/
2517 uart4_idle_pins_a: uart4-idle-0 {
2519 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
2522 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2523 bias-disable;
2527 /omit-if-no-ref/
2528 uart4_sleep_pins_a: uart4-sleep-0 {
2530 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
2535 /omit-if-no-ref/
2536 uart4_pins_b: uart4-1 {
2538 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
2539 bias-disable;
2540 drive-push-pull;
2541 slew-rate = <0>;
2544 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2545 bias-disable;
2549 /omit-if-no-ref/
2550 uart4_pins_c: uart4-2 {
2552 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2553 bias-disable;
2554 drive-push-pull;
2555 slew-rate = <0>;
2558 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2559 bias-disable;
2563 /omit-if-no-ref/
2564 uart4_pins_d: uart4-3 {
2566 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
2567 bias-disable;
2568 drive-push-pull;
2569 slew-rate = <0>;
2572 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2573 bias-disable;
2577 /omit-if-no-ref/
2578 uart4_idle_pins_d: uart4-idle-3 {
2580 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
2583 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2584 bias-disable;
2588 /omit-if-no-ref/
2589 uart4_sleep_pins_d: uart4-sleep-3 {
2591 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
2596 /omit-if-no-ref/
2597 uart5_pins_a: uart5-0 {
2599 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
2600 bias-disable;
2601 drive-push-pull;
2602 slew-rate = <0>;
2605 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
2606 bias-disable;
2610 /omit-if-no-ref/
2611 uart7_pins_a: uart7-0 {
2613 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2614 bias-disable;
2615 drive-push-pull;
2616 slew-rate = <0>;
2619 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2622 bias-disable;
2626 /omit-if-no-ref/
2627 uart7_pins_b: uart7-1 {
2629 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2630 bias-disable;
2631 drive-push-pull;
2632 slew-rate = <0>;
2635 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2636 bias-disable;
2640 /omit-if-no-ref/
2641 uart7_pins_c: uart7-2 {
2643 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2644 bias-disable;
2645 drive-push-pull;
2646 slew-rate = <0>;
2649 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2650 bias-pull-up;
2654 /omit-if-no-ref/
2655 uart7_idle_pins_c: uart7-idle-2 {
2657 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2660 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2661 bias-pull-up;
2665 /omit-if-no-ref/
2666 uart7_sleep_pins_c: uart7-sleep-2 {
2668 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2673 /omit-if-no-ref/
2674 uart8_pins_a: uart8-0 {
2676 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2677 bias-disable;
2678 drive-push-pull;
2679 slew-rate = <0>;
2682 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2683 bias-disable;
2687 /omit-if-no-ref/
2688 uart8_rtscts_pins_a: uart8rtscts-0 {
2690 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2692 bias-disable;
2696 /omit-if-no-ref/
2697 usart1_pins_a: usart1-0 {
2699 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */
2700 bias-disable;
2701 drive-push-pull;
2702 slew-rate = <0>;
2705 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2706 bias-disable;
2710 /omit-if-no-ref/
2711 usart1_idle_pins_a: usart1-idle-0 {
2713 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2718 /omit-if-no-ref/
2719 usart1_sleep_pins_a: usart1-sleep-0 {
2721 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2726 /omit-if-no-ref/
2727 usart2_pins_a: usart2-0 {
2729 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2731 bias-disable;
2732 drive-push-pull;
2733 slew-rate = <0>;
2736 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2738 bias-disable;
2742 /omit-if-no-ref/
2743 usart2_sleep_pins_a: usart2-sleep-0 {
2745 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2752 /omit-if-no-ref/
2753 usart2_pins_b: usart2-1 {
2755 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2757 bias-disable;
2758 drive-push-pull;
2759 slew-rate = <0>;
2762 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2764 bias-disable;
2768 /omit-if-no-ref/
2769 usart2_sleep_pins_b: usart2-sleep-1 {
2771 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2778 /omit-if-no-ref/
2779 usart2_pins_c: usart2-2 {
2781 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2783 bias-disable;
2784 drive-push-pull;
2785 slew-rate = <0>;
2788 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2790 bias-disable;
2794 /omit-if-no-ref/
2795 usart2_idle_pins_c: usart2-idle-2 {
2797 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2801 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2802 bias-disable;
2803 drive-push-pull;
2804 slew-rate = <0>;
2807 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2808 bias-disable;
2812 /omit-if-no-ref/
2813 usart2_sleep_pins_c: usart2-sleep-2 {
2815 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2822 /omit-if-no-ref/
2823 usart3_pins_a: usart3-0 {
2825 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2826 bias-disable;
2827 drive-push-pull;
2828 slew-rate = <0>;
2831 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2832 bias-disable;
2836 /omit-if-no-ref/
2837 usart3_idle_pins_a: usart3-idle-0 {
2839 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */
2842 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2843 bias-disable;
2847 /omit-if-no-ref/
2848 usart3_sleep_pins_a: usart3-sleep-0 {
2850 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2855 /omit-if-no-ref/
2856 usart3_pins_b: usart3-1 {
2858 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2860 bias-disable;
2861 drive-push-pull;
2862 slew-rate = <0>;
2865 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2867 bias-pull-up;
2871 /omit-if-no-ref/
2872 usart3_idle_pins_b: usart3-idle-1 {
2874 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2878 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2879 bias-disable;
2880 drive-push-pull;
2881 slew-rate = <0>;
2884 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2885 bias-pull-up;
2889 /omit-if-no-ref/
2890 usart3_sleep_pins_b: usart3-sleep-1 {
2892 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2899 /omit-if-no-ref/
2900 usart3_pins_c: usart3-2 {
2902 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2904 bias-disable;
2905 drive-push-pull;
2906 slew-rate = <0>;
2909 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2911 bias-pull-up;
2915 /omit-if-no-ref/
2916 usart3_idle_pins_c: usart3-idle-2 {
2918 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2922 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2923 bias-disable;
2924 drive-push-pull;
2925 slew-rate = <0>;
2928 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2929 bias-pull-up;
2933 /omit-if-no-ref/
2934 usart3_sleep_pins_c: usart3-sleep-2 {
2936 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2943 /omit-if-no-ref/
2944 usart3_pins_d: usart3-3 {
2946 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2948 bias-disable;
2949 drive-push-pull;
2950 slew-rate = <0>;
2953 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2955 bias-disable;
2959 /omit-if-no-ref/
2960 usart3_idle_pins_d: usart3-idle-3 {
2962 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2967 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2968 bias-disable;
2972 /omit-if-no-ref/
2973 usart3_sleep_pins_d: usart3-sleep-3 {
2975 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2982 /omit-if-no-ref/
2983 usart3_pins_e: usart3-4 {
2985 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2987 bias-disable;
2988 drive-push-pull;
2989 slew-rate = <0>;
2992 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2994 bias-pull-up;
2998 /omit-if-no-ref/
2999 usart3_idle_pins_e: usart3-idle-4 {
3001 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3005 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
3006 bias-disable;
3007 drive-push-pull;
3008 slew-rate = <0>;
3011 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
3012 bias-pull-up;
3016 /omit-if-no-ref/
3017 usart3_sleep_pins_e: usart3-sleep-4 {
3019 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
3026 /omit-if-no-ref/
3027 usart3_pins_f: usart3-5 {
3029 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
3031 bias-disable;
3032 drive-push-pull;
3033 slew-rate = <0>;
3036 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
3038 bias-disable;
3042 /omit-if-no-ref/
3043 usbotg_hs_pins_a: usbotg-hs-0 {
3045 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
3049 /omit-if-no-ref/
3050 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
3052 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
3059 /omit-if-no-ref/
3060 i2c2_pins_b2: i2c2-0 {
3062 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
3063 bias-disable;
3064 drive-open-drain;
3065 slew-rate = <0>;
3069 /omit-if-no-ref/
3070 i2c2_sleep_pins_b2: i2c2-sleep-0 {
3072 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
3076 /omit-if-no-ref/
3077 i2c4_pins_a: i2c4-0 {
3079 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
3081 bias-disable;
3082 drive-open-drain;
3083 slew-rate = <0>;
3087 /omit-if-no-ref/
3088 i2c4_sleep_pins_a: i2c4-sleep-0 {
3090 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
3095 /omit-if-no-ref/
3096 i2c6_pins_a: i2c6-0 {
3098 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
3100 bias-disable;
3101 drive-open-drain;
3102 slew-rate = <0>;
3106 /omit-if-no-ref/
3107 i2c6_sleep_pins_a: i2c6-sleep-0 {
3109 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
3114 /omit-if-no-ref/
3115 spi1_pins_a: spi1-0 {
3117 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
3119 bias-disable;
3120 drive-push-pull;
3121 slew-rate = <1>;
3125 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
3126 bias-disable;
3130 /omit-if-no-ref/
3131 spi1_sleep_pins_a: spi1-sleep-0 {
3133 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
3139 /omit-if-no-ref/
3140 usart1_pins_b: usart1-1 {
3142 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
3143 bias-disable;
3144 drive-push-pull;
3145 slew-rate = <0>;
3148 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3149 bias-disable;
3153 /omit-if-no-ref/
3154 usart1_idle_pins_b: usart1-idle-1 {
3156 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
3159 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
3160 bias-disable;
3164 /omit-if-no-ref/
3165 usart1_sleep_pins_b: usart1-sleep-1 {
3167 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */