Lines Matching +full:interrupt +full:- +full:counter
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
25 arm-pmu {
26 compatible = "arm,cortex-a7-pmu";
28 interrupt-affinity = <&cpu0>;
29 interrupt-parent = <&intc>;
35 compatible = "linaro,optee-tz";
36 interrupt-parent = <&intc>;
41 compatible = "linaro,scmi-optee";
42 #address-cells = <1>;
43 #size-cells = <0>;
44 linaro,optee-channel-id = <0>;
48 #clock-cells = <1>;
53 #reset-cells = <1>;
60 #address-cells = <1>;
61 #size-cells = <0>;
65 regulator-name = "reg11";
69 regulator-name = "reg18";
73 regulator-name = "usb33";
80 intc: interrupt-controller@a0021000 {
81 compatible = "arm,cortex-a7-gic";
82 #interrupt-cells = <3>;
83 interrupt-controller;
89 compatible = "arm,psci-1.0";
94 compatible = "arm,armv7-timer";
99 interrupt-parent = <&intc>;
100 always-on;
104 compatible = "simple-bus";
105 #address-cells = <1>;
106 #size-cells = <1>;
107 interrupt-parent = <&intc>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 compatible = "st,stm32-timers";
116 interrupt-names = "global";
118 clock-names = "int";
124 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
128 compatible = "st,stm32-pwm";
129 #pwm-cells = <3>;
134 compatible = "st,stm32h7-timer-trigger";
139 counter {
140 compatible = "st,stm32-timer-counter";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "st,stm32-timers";
151 interrupt-names = "global";
153 clock-names = "int";
160 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
164 compatible = "st,stm32-pwm";
165 #pwm-cells = <3>;
170 compatible = "st,stm32h7-timer-trigger";
175 counter {
176 compatible = "st,stm32-timer-counter";
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "st,stm32-timers";
187 interrupt-names = "global";
189 clock-names = "int";
194 dma-names = "ch1", "ch2", "ch3", "up";
198 compatible = "st,stm32-pwm";
199 #pwm-cells = <3>;
204 compatible = "st,stm32h7-timer-trigger";
209 counter {
210 compatible = "st,stm32-timer-counter";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "st,stm32-timers";
221 interrupt-names = "global";
223 clock-names = "int";
230 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
234 compatible = "st,stm32-pwm";
235 #pwm-cells = <3>;
240 compatible = "st,stm32h7-timer-trigger";
245 counter {
246 compatible = "st,stm32-timer-counter";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "st,stm32-timers";
257 interrupt-names = "global";
259 clock-names = "int";
261 dma-names = "up";
265 compatible = "st,stm32h7-timer-trigger";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 compatible = "st,stm32-timers";
277 interrupt-names = "global";
279 clock-names = "int";
281 dma-names = "up";
285 compatible = "st,stm32h7-timer-trigger";
292 #address-cells = <1>;
293 #size-cells = <0>;
294 compatible = "st,stm32-lptimer";
296 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
298 clock-names = "mux";
299 wakeup-source;
303 compatible = "st,stm32-pwm-lp";
304 #pwm-cells = <3>;
309 compatible = "st,stm32-lptimer-trigger";
314 counter {
315 compatible = "st,stm32-lptimer-counter";
320 compatible = "st,stm32-lptimer-timer";
325 i2s2: audio-controller@4000b000 {
326 compatible = "st,stm32h7-i2s";
328 #sound-dai-cells = <0>;
332 dma-names = "rx", "tx";
337 compatible = "st,stm32h7-spi";
342 #address-cells = <1>;
343 #size-cells = <0>;
346 dma-names = "rx", "tx";
350 i2s3: audio-controller@4000c000 {
351 compatible = "st,stm32h7-i2s";
353 #sound-dai-cells = <0>;
357 dma-names = "rx", "tx";
362 compatible = "st,stm32h7-spi";
367 #address-cells = <1>;
368 #size-cells = <0>;
371 dma-names = "rx", "tx";
375 spdifrx: audio-controller@4000d000 {
376 compatible = "st,stm32h7-spdifrx";
378 #sound-dai-cells = <0>;
380 clock-names = "kclk";
384 dma-names = "rx", "rx-ctrl";
389 compatible = "st,stm32h7-uart";
391 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
394 wakeup-source;
397 dma-names = "rx", "tx";
402 compatible = "st,stm32h7-uart";
404 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
407 wakeup-source;
410 dma-names = "rx", "tx";
415 compatible = "st,stm32h7-uart";
417 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
420 wakeup-source;
423 dma-names = "rx", "tx";
428 compatible = "st,stm32mp13-i2c";
430 interrupt-names = "event", "error";
435 #address-cells = <1>;
436 #size-cells = <0>;
439 dma-names = "rx", "tx";
440 st,syscfg-fmp = <&syscfg 0x4 0x1>;
441 i2c-analog-filter;
446 compatible = "st,stm32mp13-i2c";
448 interrupt-names = "event", "error";
453 #address-cells = <1>;
454 #size-cells = <0>;
457 dma-names = "rx", "tx";
458 st,syscfg-fmp = <&syscfg 0x4 0x2>;
459 i2c-analog-filter;
464 compatible = "st,stm32h7-uart";
466 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
469 wakeup-source;
472 dma-names = "rx", "tx";
477 compatible = "st,stm32h7-uart";
479 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
482 wakeup-source;
485 dma-names = "rx", "tx";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 compatible = "st,stm32-timers";
498 interrupt-names = "brk", "up", "trg-com", "cc";
500 clock-names = "int";
508 dma-names = "ch1", "ch2", "ch3", "ch4",
513 compatible = "st,stm32-pwm";
514 #pwm-cells = <3>;
519 compatible = "st,stm32h7-timer-trigger";
524 counter {
525 compatible = "st,stm32-timer-counter";
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "st,stm32-timers";
539 interrupt-names = "brk", "up", "trg-com", "cc";
541 clock-names = "int";
549 dma-names = "ch1", "ch2", "ch3", "ch4",
554 compatible = "st,stm32-pwm";
555 #pwm-cells = <3>;
560 compatible = "st,stm32h7-timer-trigger";
565 counter {
566 compatible = "st,stm32-timer-counter";
572 compatible = "st,stm32h7-uart";
574 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
577 wakeup-source;
580 dma-names = "rx", "tx";
584 i2s1: audio-controller@44004000 {
585 compatible = "st,stm32h7-i2s";
587 #sound-dai-cells = <0>;
591 dma-names = "rx", "tx";
596 compatible = "st,stm32h7-spi";
601 #address-cells = <1>;
602 #size-cells = <0>;
605 dma-names = "rx", "tx";
610 compatible = "st,stm32h7-sai";
613 #address-cells = <1>;
614 #size-cells = <1>;
619 sai1a: audio-controller@4400a004 {
620 compatible = "st,stm32-sai-sub-a";
622 #sound-dai-cells = <0>;
624 clock-names = "sai_ck";
629 sai1b: audio-controller@4400a024 {
630 compatible = "st,stm32-sai-sub-b";
632 #sound-dai-cells = <0>;
634 clock-names = "sai_ck";
641 compatible = "st,stm32h7-sai";
644 #address-cells = <1>;
645 #size-cells = <1>;
650 sai2a: audio-controller@4400b004 {
651 compatible = "st,stm32-sai-sub-a";
653 #sound-dai-cells = <0>;
655 clock-names = "sai_ck";
660 sai2b: audio-controller@4400b024 {
661 compatible = "st,stm32-sai-sub-b";
663 #sound-dai-cells = <0>;
665 clock-names = "sai_ck";
672 compatible = "st,stm32mp1-dfsdm";
675 clock-names = "dfsdm";
676 #address-cells = <1>;
677 #size-cells = <0>;
681 compatible = "st,stm32-dfsdm-adc";
683 #io-channel-cells = <1>;
686 dma-names = "rx";
691 compatible = "st,stm32-dfsdm-adc";
693 #io-channel-cells = <1>;
696 dma-names = "rx";
701 dma1: dma-controller@48000000 {
702 compatible = "st,stm32-dma";
714 #dma-cells = <4>;
716 dma-requests = <8>;
719 dma2: dma-controller@48001000 {
720 compatible = "st,stm32-dma";
732 #dma-cells = <4>;
734 dma-requests = <8>;
737 dmamux1: dma-router@48002000 {
738 compatible = "st,stm32h7-dmamux";
742 #dma-cells = <3>;
743 dma-masters = <&dma1 &dma2>;
744 dma-requests = <128>;
745 dma-channels = <16>;
749 compatible = "st,stm32mp13-adc-core";
753 clock-names = "bus", "adc";
754 interrupt-controller;
755 #interrupt-cells = <1>;
756 #address-cells = <1>;
757 #size-cells = <0>;
761 compatible = "st,stm32mp13-adc";
762 #io-channel-cells = <1>;
763 #address-cells = <1>;
764 #size-cells = <0>;
766 interrupt-parent = <&adc_2>;
769 dma-names = "rx";
792 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
795 clock-names = "otg";
797 reset-names = "dwc2";
799 g-rx-fifo-size = <512>;
800 g-np-tx-fifo-size = <32>;
801 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
803 otg-rev = <0x200>;
804 usb33d-supply = <&scmi_usb33>;
809 compatible = "st,stm32h7-uart";
811 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
814 wakeup-source;
817 dma-names = "rx", "tx";
822 compatible = "st,stm32h7-uart";
824 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
827 wakeup-source;
830 dma-names = "rx", "tx";
834 i2s4: audio-controller@4c002000 {
835 compatible = "st,stm32h7-i2s";
837 #sound-dai-cells = <0>;
841 dma-names = "rx", "tx";
846 compatible = "st,stm32h7-spi";
851 #address-cells = <1>;
852 #size-cells = <0>;
855 dma-names = "rx", "tx";
860 compatible = "st,stm32h7-spi";
865 #address-cells = <1>;
866 #size-cells = <0>;
869 dma-names = "rx", "tx";
874 compatible = "st,stm32mp13-i2c";
876 interrupt-names = "event", "error";
881 #address-cells = <1>;
882 #size-cells = <0>;
885 dma-names = "rx", "tx";
886 st,syscfg-fmp = <&syscfg 0x4 0x4>;
887 i2c-analog-filter;
892 compatible = "st,stm32mp13-i2c";
894 interrupt-names = "event", "error";
899 #address-cells = <1>;
900 #size-cells = <0>;
903 dma-names = "rx", "tx";
904 st,syscfg-fmp = <&syscfg 0x4 0x8>;
905 i2c-analog-filter;
910 compatible = "st,stm32mp13-i2c";
912 interrupt-names = "event", "error";
917 #address-cells = <1>;
918 #size-cells = <0>;
921 dma-names = "rx", "tx";
922 st,syscfg-fmp = <&syscfg 0x4 0x10>;
923 i2c-analog-filter;
928 #address-cells = <1>;
929 #size-cells = <0>;
930 compatible = "st,stm32-timers";
933 interrupt-names = "global";
935 clock-names = "int";
939 compatible = "st,stm32-pwm";
940 #pwm-cells = <3>;
945 compatible = "st,stm32h7-timer-trigger";
952 #address-cells = <1>;
953 #size-cells = <0>;
954 compatible = "st,stm32-timers";
957 interrupt-names = "global";
959 clock-names = "int";
963 compatible = "st,stm32-pwm";
964 #pwm-cells = <3>;
969 compatible = "st,stm32h7-timer-trigger";
976 #address-cells = <1>;
977 #size-cells = <0>;
978 compatible = "st,stm32-timers";
981 interrupt-names = "global";
983 clock-names = "int";
987 compatible = "st,stm32-pwm";
988 #pwm-cells = <3>;
993 compatible = "st,stm32h7-timer-trigger";
1000 #address-cells = <1>;
1001 #size-cells = <0>;
1002 compatible = "st,stm32-timers";
1005 interrupt-names = "global";
1007 clock-names = "int";
1012 dma-names = "ch1", "up", "trig", "com";
1016 compatible = "st,stm32-pwm";
1017 #pwm-cells = <3>;
1022 compatible = "st,stm32h7-timer-trigger";
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1031 compatible = "st,stm32-timers";
1034 interrupt-names = "global";
1036 clock-names = "int";
1039 dma-names = "ch1", "up";
1043 compatible = "st,stm32-pwm";
1044 #pwm-cells = <3>;
1049 compatible = "st,stm32h7-timer-trigger";
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 compatible = "st,stm32-timers";
1061 interrupt-names = "global";
1063 clock-names = "int";
1066 dma-names = "ch1", "up";
1070 compatible = "st,stm32-pwm";
1071 #pwm-cells = <3>;
1076 compatible = "st,stm32h7-timer-trigger";
1083 compatible = "st,stm32mp13-rcc", "syscon";
1085 #clock-cells = <1>;
1086 #reset-cells = <1>;
1087 clock-names = "hse", "hsi", "csi", "lse", "lsi";
1095 exti: interrupt-controller@5000d000 {
1096 compatible = "st,stm32mp13-exti", "syscon";
1097 interrupt-controller;
1098 #interrupt-cells = <2>;
1103 compatible = "st,stm32mp157-syscfg", "syscon";
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1111 compatible = "st,stm32-lptimer";
1113 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1115 clock-names = "mux";
1116 wakeup-source;
1120 compatible = "st,stm32-pwm-lp";
1121 #pwm-cells = <3>;
1126 compatible = "st,stm32-lptimer-trigger";
1131 counter {
1132 compatible = "st,stm32-lptimer-counter";
1137 compatible = "st,stm32-lptimer-timer";
1143 #address-cells = <1>;
1144 #size-cells = <0>;
1145 compatible = "st,stm32-lptimer";
1147 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1149 clock-names = "mux";
1150 wakeup-source;
1154 compatible = "st,stm32-pwm-lp";
1155 #pwm-cells = <3>;
1160 compatible = "st,stm32-lptimer-trigger";
1166 compatible = "st,stm32-lptimer-timer";
1172 compatible = "st,stm32-lptimer";
1174 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1176 clock-names = "mux";
1177 wakeup-source;
1181 compatible = "st,stm32-pwm-lp";
1182 #pwm-cells = <3>;
1187 compatible = "st,stm32-lptimer-timer";
1193 compatible = "st,stm32-lptimer";
1195 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1197 clock-names = "mux";
1198 wakeup-source;
1202 compatible = "st,stm32-pwm-lp";
1203 #pwm-cells = <3>;
1208 compatible = "st,stm32-lptimer-timer";
1214 compatible = "st,stm32mp13-hash";
1220 dma-names = "in";
1225 compatible = "st,stm32mp13-rng";
1232 mdma: dma-controller@58000000 {
1233 compatible = "st,stm32h7-mdma";
1237 #dma-cells = <5>;
1238 dma-channels = <32>;
1239 dma-requests = <48>;
1242 fmc: memory-controller@58002000 {
1243 compatible = "st,stm32mp1-fmc2-ebi";
1250 #address-cells = <2>;
1251 #size-cells = <1>;
1256 nand-controller@4,0 {
1257 compatible = "st,stm32mp1-fmc2-nfc";
1264 #address-cells = <1>;
1265 #size-cells = <0>;
1270 dma-names = "tx", "rx", "ecc";
1276 compatible = "st,stm32f469-qspi";
1278 reg-names = "qspi", "qspi_mm";
1279 #address-cells = <1>;
1280 #size-cells = <0>;
1284 dma-names = "tx", "rx";
1291 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1292 arm,primecell-periphid = <0x20253180>;
1296 clock-names = "apb_pclk";
1298 cap-sd-highspeed;
1299 cap-mmc-highspeed;
1300 max-frequency = <130000000>;
1305 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1306 arm,primecell-periphid = <0x20253180>;
1310 clock-names = "apb_pclk";
1312 cap-sd-highspeed;
1313 cap-mmc-highspeed;
1314 max-frequency = <130000000>;
1319 compatible = "generic-ohci";
1328 compatible = "generic-ehci";
1338 compatible = "st,stm32mp1-iwdg";
1341 clock-names = "pclk", "lsi";
1346 #address-cells = <1>;
1347 #size-cells = <0>;
1348 #clock-cells = <0>;
1349 compatible = "st,stm32mp1-usbphyc";
1353 vdda1v1-supply = <&scmi_reg11>;
1354 vdda1v8-supply = <&scmi_reg18>;
1357 usbphyc_port0: usb-phy@0 {
1358 #phy-cells = <0>;
1362 usbphyc_port1: usb-phy@1 {
1363 #phy-cells = <1>;
1369 compatible = "st,stm32mp1-rtc";
1371 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
1374 clock-names = "pclk", "rtc_ck";
1379 compatible = "st,stm32mp13-bsec";
1381 #address-cells = <1>;
1382 #size-cells = <1>;
1401 #address-cells = <1>;
1402 #size-cells = <1>;
1403 compatible = "st,stm32mp135-pinctrl";
1405 interrupt-parent = <&exti>;
1409 gpio-controller;
1410 #gpio-cells = <2>;
1411 interrupt-controller;
1412 #interrupt-cells = <2>;
1415 st,bank-name = "GPIOA";
1417 gpio-ranges = <&pinctrl 0 0 16>;
1421 gpio-controller;
1422 #gpio-cells = <2>;
1423 interrupt-controller;
1424 #interrupt-cells = <2>;
1427 st,bank-name = "GPIOB";
1429 gpio-ranges = <&pinctrl 0 16 16>;
1433 gpio-controller;
1434 #gpio-cells = <2>;
1435 interrupt-controller;
1436 #interrupt-cells = <2>;
1439 st,bank-name = "GPIOC";
1441 gpio-ranges = <&pinctrl 0 32 16>;
1445 gpio-controller;
1446 #gpio-cells = <2>;
1447 interrupt-controller;
1448 #interrupt-cells = <2>;
1451 st,bank-name = "GPIOD";
1453 gpio-ranges = <&pinctrl 0 48 16>;
1457 gpio-controller;
1458 #gpio-cells = <2>;
1459 interrupt-controller;
1460 #interrupt-cells = <2>;
1463 st,bank-name = "GPIOE";
1465 gpio-ranges = <&pinctrl 0 64 16>;
1469 gpio-controller;
1470 #gpio-cells = <2>;
1471 interrupt-controller;
1472 #interrupt-cells = <2>;
1475 st,bank-name = "GPIOF";
1477 gpio-ranges = <&pinctrl 0 80 16>;
1481 gpio-controller;
1482 #gpio-cells = <2>;
1483 interrupt-controller;
1484 #interrupt-cells = <2>;
1487 st,bank-name = "GPIOG";
1489 gpio-ranges = <&pinctrl 0 96 16>;
1493 gpio-controller;
1494 #gpio-cells = <2>;
1495 interrupt-controller;
1496 #interrupt-cells = <2>;
1499 st,bank-name = "GPIOH";
1501 gpio-ranges = <&pinctrl 0 112 15>;
1505 gpio-controller;
1506 #gpio-cells = <2>;
1507 interrupt-controller;
1508 #interrupt-cells = <2>;
1511 st,bank-name = "GPIOI";
1513 gpio-ranges = <&pinctrl 0 128 8>;