Lines Matching +full:pinmux +full:-
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
16 i2c1_pins_a: i2c1-0 {
18 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
20 bias-disable;
21 drive-open-drain;
22 slew-rate = <0>;
26 i2c1_sleep_pins_a: i2c1-sleep-0 {
28 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
33 i2c5_pins_a: i2c5-0 {
35 pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
37 bias-disable;
38 drive-open-drain;
39 slew-rate = <0>;
43 i2c5_sleep_pins_a: i2c5-sleep-0 {
45 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
50 mcp23017_pins_a: mcp23017-0 {
52 pinmux = <STM32_PINMUX('G', 12, GPIO)>;
53 bias-pull-up;
57 pwm3_pins_a: pwm3-0 {
59 pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */
60 bias-pull-down;
61 drive-push-pull;
62 slew-rate = <0>;
66 pwm3_sleep_pins_a: pwm3-sleep-0 {
68 pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */
72 pwm4_pins_a: pwm4-0 {
74 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
75 bias-pull-down;
76 drive-push-pull;
77 slew-rate = <0>;
81 pwm4_sleep_pins_a: pwm4-sleep-0 {
83 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
87 pwm8_pins_a: pwm8-0 {
89 pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */
90 bias-pull-down;
91 drive-push-pull;
92 slew-rate = <0>;
96 pwm8_sleep_pins_a: pwm8-sleep-0 {
98 pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */
102 pwm14_pins_a: pwm14-0 {
104 pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */
105 bias-pull-down;
106 drive-push-pull;
107 slew-rate = <0>;
111 pwm14_sleep_pins_a: pwm14-sleep-0 {
113 pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */
117 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
119 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
124 slew-rate = <1>;
125 drive-push-pull;
126 bias-disable;
130 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
132 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
136 slew-rate = <1>;
137 drive-push-pull;
138 bias-disable;
141 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
142 slew-rate = <1>;
143 drive-open-drain;
144 bias-disable;
148 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
150 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
159 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
161 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
162 slew-rate = <1>;
163 drive-push-pull;
164 bias-disable;
168 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
170 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
175 slew-rate = <1>;
176 drive-push-pull;
177 bias-pull-up;
181 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
183 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
187 slew-rate = <1>;
188 drive-push-pull;
189 bias-pull-up;
192 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
193 slew-rate = <1>;
194 drive-open-drain;
195 bias-pull-up;
199 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
201 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
210 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
212 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
213 slew-rate = <1>;
214 drive-push-pull;
215 bias-pull-up;
219 spi5_pins_a: spi5-0 {
221 pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
223 bias-disable;
224 drive-push-pull;
225 slew-rate = <1>;
229 pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
230 bias-disable;
234 spi5_sleep_pins_a: spi5-sleep-0 {
236 pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
242 stm32g0_intn_pins_a: stm32g0-intn-0 {
244 pinmux = <STM32_PINMUX('I', 2, GPIO)>;
245 bias-pull-up;
249 uart4_pins_a: uart4-0 {
251 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
252 bias-disable;
253 drive-push-pull;
254 slew-rate = <0>;
257 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
258 bias-disable;
262 uart4_idle_pins_a: uart4-idle-0 {
264 pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */
267 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
268 bias-disable;
272 uart4_sleep_pins_a: uart4-sleep-0 {
274 pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */
279 uart8_pins_a: uart8-0 {
281 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
282 bias-disable;
283 drive-push-pull;
284 slew-rate = <0>;
287 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
288 bias-pull-up;
292 uart8_idle_pins_a: uart8-idle-0 {
294 pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */
297 pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
298 bias-pull-up;
302 uart8_sleep_pins_a: uart8-sleep-0 {
304 pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */
309 usart1_pins_a: usart1-0 {
311 pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
313 bias-disable;
314 drive-push-pull;
315 slew-rate = <0>;
318 pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
320 bias-pull-up;
324 usart1_idle_pins_a: usart1-idle-0 {
326 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
330 pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
331 bias-disable;
332 drive-push-pull;
333 slew-rate = <0>;
336 pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */
337 bias-pull-up;
341 usart1_sleep_pins_a: usart1-sleep-0 {
343 pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */
350 usart2_pins_a: usart2-0 {
352 pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */
354 bias-disable;
355 drive-push-pull;
356 slew-rate = <0>;
359 pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */
361 bias-disable;
365 usart2_idle_pins_a: usart2-idle-0 {
367 pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */
371 pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */
372 bias-disable;
373 drive-push-pull;
374 slew-rate = <0>;
377 pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */
378 bias-disable;
382 usart2_sleep_pins_a: usart2-sleep-0 {
384 pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */