Lines Matching +full:pinmux +full:-

2  * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
49 pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
59 pinmux = <STM32_PINMUX('G', 11, AF11)>,
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
74 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
80 slew-rate = <3>;
81 drive-push-pull;
82 bias-disable;
86 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
88 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
93 slew-rate = <3>;
94 drive-push-pull;
95 bias-disable;
98 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
99 slew-rate = <3>;
100 drive-open-drain;
101 bias-disable;
105 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
107 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
116 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
118 pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
121 slew-rate = <3>;
122 drive-push-pull;
123 bias-pull-up;
126 pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
127 bias-pull-up;
131 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
133 pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
140 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
142 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */
148 slew-rate = <3>;
149 drive-push-pull;
150 bias-disable;
154 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
156 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
161 slew-rate = <3>;
162 drive-push-pull;
163 bias-disable;
166 pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
167 slew-rate = <3>;
168 drive-open-drain;
169 bias-disable;
173 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
175 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */
184 spi1_pins: spi1-0 {
186 pinmux = <STM32_PINMUX('A', 5, AF5)>,
190 bias-disable;
191 drive-push-pull;
192 slew-rate = <2>;
195 pinmux = <STM32_PINMUX('G', 9, AF5)>;
197 bias-disable;
201 uart4_pins: uart4-0 {
203 pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
204 bias-disable;
205 drive-push-pull;
206 slew-rate = <0>;
209 pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */
210 bias-disable;
214 usart1_pins: usart1-0 {
216 pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
217 bias-disable;
218 drive-push-pull;
219 slew-rate = <0>;
222 pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */
223 bias-disable;
227 usart2_pins: usart2-0 {
229 pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <0>;
235 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
236 bias-disable;
240 usart3_pins: usart3-0 {
242 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
244 bias-disable;
245 drive-push-pull;
246 slew-rate = <0>;
249 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
251 bias-disable;
255 usbotg_hs_pins_a: usbotg-hs-0 {
257 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
269 bias-disable;
270 drive-push-pull;
271 slew-rate = <2>;