Lines Matching +full:trigger +full:- +full:address
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
55 clock-frequency = <0>;
58 clk-lse {
59 #clock-cells = <0>;
60 compatible = "fixed-clock";
61 clock-frequency = <32768>;
64 clk-lsi {
65 #clock-cells = <0>;
66 compatible = "fixed-clock";
67 clock-frequency = <32000>;
70 clk_i2s_ckin: clk-i2s-ckin {
71 #clock-cells = <0>;
72 compatible = "fixed-clock";
73 clock-frequency = <48000000>;
79 #address-cells = <1>;
80 #size-cells = <0>;
81 compatible = "st,stm32-timers";
84 clock-names = "int";
88 compatible = "st,stm32-pwm";
89 #pwm-cells = <3>;
94 compatible = "st,stm32-timer-trigger";
101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "st,stm32-timers";
106 clock-names = "int";
110 compatible = "st,stm32-pwm";
111 #pwm-cells = <3>;
116 compatible = "st,stm32-timer-trigger";
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "st,stm32-timers";
128 clock-names = "int";
132 compatible = "st,stm32-pwm";
133 #pwm-cells = <3>;
138 compatible = "st,stm32-timer-trigger";
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "st,stm32-timers";
150 clock-names = "int";
154 compatible = "st,stm32-pwm";
155 #pwm-cells = <3>;
160 compatible = "st,stm32-timer-trigger";
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "st,stm32-timers";
172 clock-names = "int";
176 compatible = "st,stm32-timer-trigger";
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "st,stm32-timers";
188 clock-names = "int";
192 compatible = "st,stm32-timer-trigger";
199 #address-cells = <1>;
200 #size-cells = <0>;
201 compatible = "st,stm32-timers";
204 clock-names = "int";
208 compatible = "st,stm32-pwm";
209 #pwm-cells = <3>;
214 compatible = "st,stm32-timer-trigger";
221 compatible = "st,stm32-timers";
224 clock-names = "int";
228 compatible = "st,stm32-pwm";
229 #pwm-cells = <3>;
235 compatible = "st,stm32-timers";
238 clock-names = "int";
242 compatible = "st,stm32-pwm";
243 #pwm-cells = <3>;
249 compatible = "st,stm32-rtc";
252 assigned-clocks = <&rcc 1 CLK_RTC>;
253 assigned-clock-parents = <&rcc 1 CLK_LSE>;
254 interrupt-parent = <&exti>;
261 compatible = "st,stm32f4-bxcan";
264 interrupt-names = "tx", "rx0", "rx1", "sce";
272 compatible = "st,stm32f4-gcan", "syscon";
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "st,stm32f7-spi";
288 #address-cells = <1>;
289 #size-cells = <0>;
290 compatible = "st,stm32f7-spi";
298 compatible = "st,stm32f7-uart";
306 compatible = "st,stm32f7-uart";
314 compatible = "st,stm32f7-uart";
322 compatible = "st,stm32f7-uart";
330 compatible = "st,stm32f7-i2c";
336 #address-cells = <1>;
337 #size-cells = <0>;
342 compatible = "st,stm32f7-i2c";
348 #address-cells = <1>;
349 #size-cells = <0>;
354 compatible = "st,stm32f7-i2c";
360 #address-cells = <1>;
361 #size-cells = <0>;
366 compatible = "st,stm32f7-i2c";
372 #address-cells = <1>;
373 #size-cells = <0>;
378 compatible = "st,stm32f4-bxcan";
381 interrupt-names = "tx", "rx0", "rx1", "sce";
384 st,can-primary;
390 compatible = "st,stm32f4-gcan", "syscon";
396 compatible = "st,stm32f4-bxcan";
399 interrupt-names = "tx", "rx0", "rx1", "sce";
402 st,can-secondary;
408 compatible = "st,stm32-cec";
412 clock-names = "cec", "hdmi-cec";
417 compatible = "st,stm32f7-uart";
425 compatible = "st,stm32f7-uart";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 compatible = "st,stm32-timers";
438 clock-names = "int";
442 compatible = "st,stm32-pwm";
443 #pwm-cells = <3>;
448 compatible = "st,stm32-timer-trigger";
455 #address-cells = <1>;
456 #size-cells = <0>;
457 compatible = "st,stm32-timers";
460 clock-names = "int";
464 compatible = "st,stm32-pwm";
465 #pwm-cells = <3>;
470 compatible = "st,stm32-timer-trigger";
477 compatible = "st,stm32f7-uart";
485 compatible = "st,stm32f7-uart";
494 arm,primecell-periphid = <0x00880180>;
497 clock-names = "apb_pclk";
499 max-frequency = <48000000>;
505 arm,primecell-periphid = <0x00880180>;
508 clock-names = "apb_pclk";
510 max-frequency = <48000000>;
515 #address-cells = <1>;
516 #size-cells = <0>;
517 compatible = "st,stm32f7-spi";
525 #address-cells = <1>;
526 #size-cells = <0>;
527 compatible = "st,stm32f7-spi";
535 compatible = "st,stm32-syscfg", "syscon";
540 exti: interrupt-controller@40013c00 {
541 compatible = "st,stm32-exti";
542 interrupt-controller;
543 #interrupt-cells = <2>;
549 #address-cells = <1>;
550 #size-cells = <0>;
551 compatible = "st,stm32-timers";
554 clock-names = "int";
558 compatible = "st,stm32-pwm";
559 #pwm-cells = <3>;
564 compatible = "st,stm32-timer-trigger";
571 compatible = "st,stm32-timers";
574 clock-names = "int";
578 compatible = "st,stm32-pwm";
579 #pwm-cells = <3>;
585 compatible = "st,stm32-timers";
588 clock-names = "int";
592 compatible = "st,stm32-pwm";
593 #pwm-cells = <3>;
599 #address-cells = <1>;
600 #size-cells = <0>;
601 compatible = "st,stm32f7-spi";
609 #address-cells = <1>;
610 #size-cells = <0>;
611 compatible = "st,stm32f7-spi";
618 ltdc: display-controller@40016800 {
619 compatible = "st,stm32-ltdc";
624 clock-names = "lcd";
628 pwrcfg: power-config@40007000 {
629 compatible = "st,stm32-power-config", "syscon";
634 compatible = "st,stm32f7-crc";
641 #reset-cells = <1>;
642 #clock-cells = <2>;
643 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
647 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
648 assigned-clock-rates = <1000000>;
651 dma1: dma-controller@40026000 {
652 compatible = "st,stm32-dma";
663 #dma-cells = <4>;
667 dma2: dma-controller@40026400 {
668 compatible = "st,stm32-dma";
679 #dma-cells = <4>;
685 compatible = "st,stm32f7-hsotg";
689 clock-names = "otg";
690 g-rx-fifo-size = <256>;
691 g-np-tx-fifo-size = <32>;
692 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
697 compatible = "st,stm32f4x9-fsotg";
701 clock-names = "otg";