Lines Matching +full:stih407 +full:- +full:powerdown
1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih418-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
11 #address-cells = <1>;
12 #size-cells = <0>;
15 compatible = "arm,cortex-a9";
17 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
18 cpu-release-addr = <0x94100A4>;
22 compatible = "arm,cortex-a9";
24 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
25 cpu-release-addr = <0x94100A4>;
30 compatible = "st,stih407-usb2-phy";
31 #phy-cells = <0>;
35 reset-names = "global", "port";
39 compatible = "st,stih407-usb2-phy";
40 #phy-cells = <0>;
44 reset-names = "global", "port";
53 compatible = "st,st-ohci-300x";
57 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
59 reset-names = "power", "softreset";
61 phy-names = "usb";
65 compatible = "st,st-ehci-300x";
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_usb0>;
71 resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
73 reset-names = "power", "softreset";
75 phy-names = "usb";
79 compatible = "st,st-ohci-300x";
83 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
85 reset-names = "power", "softreset";
87 phy-names = "usb";
91 compatible = "st,st-ehci-300x";
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_usb1>;
97 resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
99 reset-names = "power", "softreset";
101 phy-names = "usb";
105 assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
106 assigned-clock-parents = <&clk_s_c0_pll1 0>;
107 assigned-clock-rates = <200000000>;
111 compatible = "st,stih407-thermal";
113 clock-names = "thermal";