Lines Matching +full:1 +full:st
24 #address-cells = <1>;
25 #size-cells = <1>;
28 compatible = "st,stih410-clk", "simple-bus";
34 compatible = "st,clkgen-c32";
38 #clock-cells = <1>;
39 compatible = "st,stih407-clkgen-plla9";
49 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
64 clock-mult = <1>;
70 compatible = "st,clkgen-c32";
74 #clock-cells = <1>;
75 compatible = "st,clkgen-pll0-a0";
81 compatible = "st,flexgen", "st,flexgen-stih410-a0";
83 #clock-cells = <1>;
91 compatible = "st,clkgen-c32";
95 #clock-cells = <1>;
96 compatible = "st,clkgen-pll0-c0";
102 #clock-cells = <1>;
103 compatible = "st,clkgen-pll1-c0";
109 #clock-cells = <1>;
110 compatible = "st,quadfs-pll";
116 #clock-cells = <1>;
117 compatible = "st,flexgen", "st,flexgen-stih410-c0";
122 <&clk_s_c0_quadfs 1>,
139 clock-mult = <1>;
145 compatible = "st,clkgen-c32";
149 #clock-cells = <1>;
150 compatible = "st,quadfs-d0";
156 #clock-cells = <1>;
157 compatible = "st,flexgen", "st,flexgen-stih410-d0";
160 <&clk_s_d0_quadfs 1>,
168 compatible = "st,clkgen-c32";
172 #clock-cells = <1>;
173 compatible = "st,quadfs-d2";
179 #clock-cells = <1>;
180 compatible = "st,flexgen", "st,flexgen-stih407-d2";
183 <&clk_s_d2_quadfs 1>,
193 compatible = "st,clkgen-c32";
197 #clock-cells = <1>;
198 compatible = "st,quadfs-d3";
204 #clock-cells = <1>;
205 compatible = "st,flexgen", "st,flexgen-stih407-d3";
208 <&clk_s_d3_quadfs 1>,