Lines Matching +full:0 +full:x801c0000
40 #size-cells = <0>;
56 reg = <0x300>;
65 reg = <0x301>;
81 polling-delay = <0>;
93 hysteresis = <0>;
121 /* The first (always on) ESRAM 0, 128 KB */
123 reg = <0x40000000 0x20000>;
126 ranges = <0 0x40000000 0x20000>;
128 sram@0 {
130 reg = <0x0 0x10000>;
143 reg = <0x10000 0x800>;
147 reg = <0x10800 0xf800>;
154 reg = <0x40020000 0x40000>;
157 ranges = <0 0x40020000 0x40000>;
162 reg = <0x40060000 0x40000>;
165 ranges = <0 0x40060000 0x40000>;
177 reg = <0x20000 0x2000>;
183 reg = <0x801ae000 0x1000>;
199 reg = <0x801af000 0x1000>;
215 reg = <0x801a6000 0x1000>;
230 #size-cells = <0>;
232 port@0 {
233 reg = <0>;
255 #size-cells = <0>;
257 port@0 {
258 reg = <0>;
282 reg = <0x80190000 0x1000>;
297 reg = <0x801a4000 0x1000>;
315 reg = <0xa0411000 0x1000>,
316 <0xa0410100 0x100>;
321 reg = <0xa0410000 0x100>;
330 reg = <0x80150000 0x2000>;
335 reg = <0xa0412000 0x1000>;
357 reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>,
358 <0x8000f000 0x1000>, <0xa03ff000 0x1000>,
359 <0xa03cf000 0x1000>;
378 #clock-cells = <0>;
382 #clock-cells = <0>;
394 reg = <0xa03c6000 0x1000>;
403 reg = <0xa0410600 0x20>;
411 reg = <0xa0410620 0x20>;
418 reg = <0x80154000 0x1000>;
428 reg = <0x8012e000 0x80>;
435 gpio-bank = <0>;
436 gpio-ranges = <&pinctrl 0 0 32>;
443 reg = <0x8012e080 0x80>;
451 gpio-ranges = <&pinctrl 0 32 5>;
458 reg = <0x8000e000 0x80>;
466 gpio-ranges = <&pinctrl 0 64 32>;
473 reg = <0x8000e080 0x80>;
481 gpio-ranges = <&pinctrl 0 96 2>;
488 reg = <0x8000e100 0x80>;
496 gpio-ranges = <&pinctrl 0 128 32>;
503 reg = <0x8000e180 0x80>;
511 gpio-ranges = <&pinctrl 0 160 12>;
518 reg = <0x8011e000 0x80>;
526 gpio-ranges = <&pinctrl 0 192 32>;
533 reg = <0x8011e080 0x80>;
541 gpio-ranges = <&pinctrl 0 224 7>;
548 reg = <0xa03fe000 0x80>;
556 gpio-ranges = <&pinctrl 0 256 12>;
570 reg = <0xa03e0000 0x10000>;
576 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
577 <&dma 38 0 0x0>, /* Logical - MemToDev */
578 <&dma 37 0 0x2>, /* Logical - DevToMem */
579 <&dma 37 0 0x0>, /* Logical - MemToDev */
580 <&dma 36 0 0x2>, /* Logical - DevToMem */
581 <&dma 36 0 0x0>, /* Logical - MemToDev */
582 <&dma 19 0 0x2>, /* Logical - DevToMem */
583 <&dma 19 0 0x0>, /* Logical - MemToDev */
584 <&dma 18 0 0x2>, /* Logical - DevToMem */
585 <&dma 18 0 0x0>, /* Logical - MemToDev */
586 <&dma 17 0 0x2>, /* Logical - DevToMem */
587 <&dma 17 0 0x0>, /* Logical - MemToDev */
588 <&dma 16 0 0x2>, /* Logical - DevToMem */
589 <&dma 16 0 0x0>, /* Logical - MemToDev */
590 <&dma 39 0 0x2>, /* Logical - DevToMem */
591 <&dma 39 0 0x0>; /* Logical - MemToDev */
602 clocks = <&prcc_pclk 5 0>;
607 reg = <0x801C0000 0x1000>;
620 reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
631 reg = <0x80157450 0xC>;
636 reg = <0x801573c0 0x40>;
641 #thermal-sensor-cells = <0>;
734 reg = <0x80004000 0x1000>;
738 #size-cells = <0>;
751 reg = <0x80122000 0x1000>;
755 #size-cells = <0>;
769 reg = <0x80128000 0x1000>;
773 #size-cells = <0>;
787 reg = <0x80110000 0x1000>;
791 #size-cells = <0>;
795 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
805 reg = <0x8012a000 0x1000>;
809 #size-cells = <0>;
823 reg = <0x80002000 0x1000>;
826 #size-cells = <0>;
829 dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
830 <&dma 8 0 0x0>; /* Logical - MemToDev */
840 reg = <0x80003000 0x1000>;
843 #size-cells = <0>;
846 dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
847 <&dma 9 0 0x0>; /* Logical - MemToDev */
857 reg = <0x8011a000 0x1000>;
860 #size-cells = <0>;
864 dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
865 <&dma 0 0 0x0>; /* Logical - MemToDev */
874 reg = <0x80112000 0x1000>;
877 #size-cells = <0>;
881 dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
882 <&dma 35 0 0x0>; /* Logical - MemToDev */
891 reg = <0x80111000 0x1000>;
894 #size-cells = <0>;
898 dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
899 <&dma 33 0 0x0>; /* Logical - MemToDev */
908 reg = <0x80129000 0x1000>;
911 #size-cells = <0>;
915 dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
916 <&dma 40 0 0x0>; /* Logical - MemToDev */
926 reg = <0x80120000 0x1000>;
929 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
930 <&dma 13 0 0x0>; /* Logical - MemToDev */
933 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
942 reg = <0x80121000 0x1000>;
945 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
946 <&dma 12 0 0x0>; /* Logical - MemToDev */
958 reg = <0x80007000 0x1000>;
961 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
962 <&dma 11 0 0x0>; /* Logical - MemToDev */
974 reg = <0x80126000 0x1000>;
977 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
978 <&dma 29 0 0x0>; /* Logical - MemToDev */
991 reg = <0x80118000 0x1000>;
994 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
995 <&dma 32 0 0x0>; /* Logical - MemToDev */
1008 reg = <0x80005000 0x1000>;
1011 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
1012 <&dma 28 0 0x0>; /* Logical - MemToDev */
1025 reg = <0x80119000 0x1000>;
1028 dmas = <&dma 41 0 0x2>, /* Logical - DevToMem */
1029 <&dma 41 0 0x0>; /* Logical - MemToDev */
1042 reg = <0x80114000 0x1000>;
1045 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
1046 <&dma 42 0 0x0>; /* Logical - MemToDev */
1059 reg = <0x80008000 0x1000>;
1062 dmas = <&dma 43 0 0x2>, /* Logical - DevToMem */
1063 <&dma 43 0 0x0>; /* Logical - MemToDev */
1081 reg = <0x80123000 0x1000>;
1085 dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
1086 <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
1098 reg = <0x80124000 0x1000>;
1103 dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
1116 reg = <0x80117000 0x1000>;
1120 dmas = <&dma 14 0 0x12>, /* Logical - DevToMem - HighPrio */
1121 <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
1134 reg = <0x80125000 0x1000>;
1139 dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
1151 reg = <0x50000000 0x4000000>;
1154 ranges = <0 0x50000000 0x4000000>;
1165 reg = <0xa0300000 0x10000>;
1184 reg = <0xa0350000 0x1000>;
1198 reg = <0xa0351000 0x1000>;
1202 #size-cells = <0>;
1206 reg = <0xa0352000 0x1000>;
1210 #size-cells = <0>;
1214 reg = <0xa0353000 0x1000>;
1219 #size-cells = <0>;
1225 reg = <0xa03cb000 0x1000>;
1233 reg = <0xa03c2000 0x1000>;