Lines Matching +full:1 +full:st
12 model = "ST SPEAr1340 Evaluation Board";
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
28 st,pins = "pads_as_gpio_grp";
29 st,function = "pads_as_gpio";
32 st,pins = "fsmc_8bit_grp";
33 st,function = "fsmc";
36 st,pins = "uart0_grp";
37 st,function = "uart0";
40 st,pins = "i2c0_grp";
41 st,function = "i2c0";
44 st,pins = "i2c1_grp";
45 st,function = "i2c1";
48 st,pins = "spdif_in_grp";
49 st,function = "spdif_in";
52 st,pins = "spdif_out_grp";
53 st,function = "spdif_out";
56 st,pins = "ssp0_grp", "ssp0_cs1_grp", "ssp0_cs2_grp", "ssp0_cs3_grp";
57 st,function = "ssp0";
60 st,pins = "smi_grp";
61 st,function = "smi";
64 st,pins = "i2s_in_grp", "i2s_out_grp";
65 st,function = "i2s";
68 st,pins = "gmii_grp", "rgmii_grp";
69 st,function = "gmac";
72 st,pins = "cam0_grp";
73 st,function = "cam0";
76 st,pins = "cam1_grp";
77 st,function = "cam1";
80 st,pins = "cam2_grp";
81 st,function = "cam2";
84 st,pins = "cam3_grp";
85 st,function = "cam3";
88 st,pins = "cec0_grp";
89 st,function = "cec0";
92 st,pins = "cec1_grp";
93 st,function = "cec1";
96 st,pins = "sdhci_grp";
97 st,function = "sdhci";
100 st,pins = "clcd_grp";
101 st,function = "clcd";
104 st,pins = "sata_grp";
105 st,function = "sata";
108 st,pins = "pcie_grp";
109 st,function = "pcie";
174 #address-cells = <1>;
175 #size-cells = <1>;
177 st,smi-fast-mode;
212 #address-cells = <1>;
215 button@1 {
218 gpios = <&gpio1 1 0x4>;
301 sta529: sta529@1a {
302 compatible = "st,sta529";
311 compatible = "st,eeprom";
316 compatible = "st,stmpe801";
317 #address-cells = <1>;
325 compatible = "st,stmpe-gpio";
415 st,mode = <0>;
458 stmpe610@1 {
459 compatible = "st,stmpe610";
462 reg = <1>;
474 #address-cells = <1>;
478 compatible = "st,stmpe-ts";
480 ts,mod-12b = <1>;
482 ts,adc-freq = <1>;
483 ts,ave-ctrl = <1>;
487 ts,i-drive = <1>;