Lines Matching +full:usb +full:- +full:dmac
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-sld8";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
24 enable-method = "psci";
25 next-level-cache = <&l2>;
30 compatible = "arm,psci-0.2";
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <25000000>;
41 arm_timer_clk: arm-timer {
42 #clock-cells = <0>;
43 compatible = "fixed-clock";
44 clock-frequency = <50000000>;
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
53 interrupt-parent = <&intc>;
55 l2: cache-controller@500c0000 {
56 compatible = "socionext,uniphier-system-cache";
61 cache-unified;
62 cache-size = <(256 * 1024)>;
63 cache-sets = <256>;
64 cache-line-size = <128>;
65 cache-level = <2>;
69 compatible = "socionext,uniphier-scssi";
72 #address-cells = <1>;
73 #size-cells = <0>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_spi0>;
82 compatible = "socionext,uniphier-uart";
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_uart0>;
93 compatible = "socionext,uniphier-uart";
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_uart1>;
104 compatible = "socionext,uniphier-uart";
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_uart2>;
115 compatible = "socionext,uniphier-uart";
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_uart3>;
126 compatible = "socionext,uniphier-gpio";
128 interrupt-parent = <&aidet>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 gpio-controller;
132 #gpio-cells = <2>;
133 gpio-ranges = <&pinctrl 0 0 0>,
136 gpio-ranges-group-names = "gpio_range0",
140 socionext,interrupt-ranges = <0 48 13>, <14 62 2>;
144 compatible = "socionext,uniphier-i2c";
147 #address-cells = <1>;
148 #size-cells = <0>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c0>;
154 clock-frequency = <100000>;
158 compatible = "socionext,uniphier-i2c";
161 #address-cells = <1>;
162 #size-cells = <0>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
168 clock-frequency = <100000>;
171 /* chip-internal connection for DMD */
173 compatible = "socionext,uniphier-i2c";
175 #address-cells = <1>;
176 #size-cells = <0>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c2>;
182 clock-frequency = <400000>;
186 compatible = "socionext,uniphier-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c3>;
196 clock-frequency = <100000>;
199 system_bus: system-bus@58c00000 {
200 compatible = "socionext,uniphier-system-bus";
203 #address-cells = <2>;
204 #size-cells = <1>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_system_bus>;
210 compatible = "socionext,uniphier-smpctrl";
215 compatible = "socionext,uniphier-sld8-mioctrl",
216 "simple-mfd", "syscon";
219 mio_clk: clock-controller {
220 compatible = "socionext,uniphier-sld8-mio-clock";
221 #clock-cells = <1>;
224 mio_rst: reset-controller {
225 compatible = "socionext,uniphier-sld8-mio-reset";
226 #reset-cells = <1>;
231 compatible = "socionext,uniphier-sld8-perictrl",
232 "simple-mfd", "syscon";
235 peri_clk: clock-controller {
236 compatible = "socionext,uniphier-sld8-peri-clock";
237 #clock-cells = <1>;
240 peri_rst: reset-controller {
241 compatible = "socionext,uniphier-sld8-peri-reset";
242 #reset-cells = <1>;
246 dmac: dma-controller@5a000000 { label
247 compatible = "socionext,uniphier-mio-dmac";
258 #dma-cells = <1>;
262 compatible = "socionext,uniphier-sd-v2.91";
266 pinctrl-names = "default", "uhs";
267 pinctrl-0 = <&pinctrl_sd>;
268 pinctrl-1 = <&pinctrl_sd_uhs>;
270 reset-names = "host", "bridge";
272 dma-names = "rx-tx";
273 dmas = <&dmac 4>;
274 bus-width = <4>;
275 cap-sd-highspeed;
276 sd-uhs-sdr12;
277 sd-uhs-sdr25;
278 sd-uhs-sdr50;
279 socionext,syscon-uhs-mode = <&mioctrl 0>;
283 compatible = "socionext,uniphier-sd-v2.91";
287 pinctrl-names = "default";
288 pinctrl-0 = <&pinctrl_emmc>;
290 reset-names = "host", "bridge", "hw";
292 dma-names = "rx-tx";
293 dmas = <&dmac 6>;
294 bus-width = <8>;
295 cap-mmc-highspeed;
296 cap-mmc-hw-reset;
297 non-removable;
300 usb0: usb@5a800100 {
301 compatible = "socionext,uniphier-ehci", "generic-ehci";
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_usb0>;
311 has-transaction-translator;
314 usb1: usb@5a810100 {
315 compatible = "socionext,uniphier-ehci", "generic-ehci";
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_usb1>;
325 has-transaction-translator;
328 usb2: usb@5a820100 {
329 compatible = "socionext,uniphier-ehci", "generic-ehci";
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_usb2>;
339 has-transaction-translator;
343 compatible = "socionext,uniphier-sld8-soc-glue",
344 "simple-mfd", "syscon";
348 compatible = "socionext,uniphier-sld8-pinctrl";
353 compatible = "socionext,uniphier-sld8-soc-glue-debug",
354 "simple-mfd", "syscon";
356 #address-cells = <1>;
357 #size-cells = <1>;
361 compatible = "socionext,uniphier-efuse";
366 compatible = "socionext,uniphier-efuse";
372 compatible = "arm,cortex-a9-global-timer";
380 compatible = "arm,cortex-a9-twd-timer";
387 intc: interrupt-controller@60001000 {
388 compatible = "arm,cortex-a9-gic";
391 #interrupt-cells = <3>;
392 interrupt-controller;
395 aidet: interrupt-controller@61830000 {
396 compatible = "socionext,uniphier-sld8-aidet";
398 interrupt-controller;
399 #interrupt-cells = <2>;
403 compatible = "socionext,uniphier-sld8-sysctrl",
404 "simple-mfd", "syscon";
407 sys_clk: clock-controller {
408 compatible = "socionext,uniphier-sld8-clock";
409 #clock-cells = <1>;
412 sys_rst: reset-controller {
413 compatible = "socionext,uniphier-sld8-reset";
414 #reset-cells = <1>;
418 nand: nand-controller@68000000 {
419 compatible = "socionext,uniphier-denali-nand-v5a";
421 reg-names = "nand_data", "denali_reg";
423 #address-cells = <1>;
424 #size-cells = <0>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_nand>;
428 clock-names = "nand", "nand_x", "ecc";
430 reset-names = "nand", "reg";
436 #include "uniphier-pinctrl.dtsi"