Lines Matching +full:msc313 +full:- +full:cpupll

1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 	#address-cells = <1>;
13 	#size-cells = <1>;
14 	interrupt-parent = <&gic>;
17 		#address-cells = <1>;
18 		#size-cells = <0>;
22 			compatible = "arm,cortex-a7";
24 			clocks = <&cpupll>;
25 			clock-names = "cpuclk";
30 		compatible = "arm,armv7-timer";
41 		 * u-boot is broken
43 		clock-frequency = <6000000>;
44 		arm,cpu-registers-not-fw-configured;
48 		compatible = "arm,cortex-a7-pmu";
50 		interrupt-affinity = <&cpu0>;
55 			#clock-cells = <0>;
56 			compatible = "fixed-clock";
57 			clock-frequency = <24000000>;
61 			#clock-cells = <0>;
62 			compatible = "fixed-clock";
63 			clock-frequency = <32768>;
68 			#clock-cells = <0>;
69 			compatible = "fixed-factor-clock";
71 			clock-div = <2>;
72 			clock-mult = <1>;
77 		compatible = "simple-bus";
78 		#address-cells = <1>;
79 		#size-cells = <1>;
84 		gic: interrupt-controller@16001000 {
85 			compatible = "arm,cortex-a7-gic";
90 			#interrupt-cells = <3>;
91 			interrupt-controller;
97 			compatible = "simple-bus";
99 			#address-cells = <1>;
100 			#size-cells = <1>;
104 				compatible = "mstar,msc313-pmsleep", "syscon";
109 				compatible = "syscon-reboot";
116 				compatible = "mstar,msc313-rtc";
119 				interrupts-extended = <&intc_irq GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
123 				compatible = "mstar,msc313e-wdt";
129 			intc_fiq: interrupt-controller@201310 {
130 				compatible = "mstar,mst-intc";
132 				#interrupt-cells = <3>;
133 				interrupt-controller;
134 				interrupt-parent = <&gic>;
135 				mstar,irqs-map-range = <96 127>;
138 			intc_irq: interrupt-controller@201350 {
139 				compatible = "mstar,mst-intc";
141 				#interrupt-cells = <3>;
142 				interrupt-controller;
143 				interrupt-parent = <&gic>;
144 				mstar,irqs-map-range = <32 95>;
145 				mstar,intc-no-eoi;
154 				compatible = "mstar,msc313-mpll";
155 				#clock-cells = <1>;
160 			cpupll: cpupll@206400 {  label
161 				compatible = "mstar,msc313-cpupll";
163 				#clock-cells = <0>;
168 				#gpio-cells = <2>;
170 				gpio-controller;
171 				#interrupt-cells = <2>;
172 				interrupt-controller;
173 				interrupt-parent = <&intc_fiq>;
180 				reg-shift = <3>;
181 				interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
182 				clock-frequency = <172000000>;
188 			compatible = "mmio-sram";