Lines Matching full:clocks
82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
94 clocks: clock-controller@e0100000 {
98 clocks = <&xxti>, <&xusbxti>;
125 clocks = <&clocks CLK_PDMA0>;
135 clocks = <&clocks CLK_PDMA1>;
145 clocks = <&clocks CLK_TSADC>;
158 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
174 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
188 clocks = <&clocks CLK_KEYIF>;
198 clocks = <&clocks CLK_I2C0>;
212 clocks = <&clocks CLK_I2C2>;
227 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
228 <&clocks FOUT_EPLL>,
229 <&clocks SCLK_AUDIO0>;
243 clocks = <&clk_audss CLK_I2S>,
261 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
276 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
289 clocks = <&clocks CLK_PWM>;
299 clocks = <&clocks CLK_WDT>;
307 clocks = <&clocks CLK_RTC>;
319 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
320 <&clocks SCLK_UART0>;
331 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
332 <&clocks SCLK_UART1>;
343 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
344 <&clocks SCLK_UART2>;
355 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
356 <&clocks SCLK_UART3>;
366 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
367 <&clocks SCLK_MMC0>;
377 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
378 <&clocks SCLK_MMC1>;
388 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
389 <&clocks SCLK_MMC2>;
399 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
400 <&clocks SCLK_MMC3>;
409 clocks = <&clocks CLK_USB_OTG>;
420 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
431 clocks = <&clocks CLK_USB_HOST>;
443 clocks = <&clocks CLK_USB_HOST>;
455 clocks = <&clocks CLK_MFC>, <&clocks DOUT_MFC>;
493 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
513 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
522 clocks = <&clocks CLK_MDMA>;
532 clocks = <&clocks CLK_ROTATOR>;
541 clocks = <&clocks CLK_I2C1>;
553 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
565 clocks = <&clocks CLK_CSIS>,
566 <&clocks SCLK_CSIS>;
580 clocks = <&clocks CLK_FIMC0>,
581 <&clocks SCLK_FIMC0>;
594 clocks = <&clocks CLK_FIMC1>,
595 <&clocks SCLK_FIMC1>;
610 clocks = <&clocks CLK_FIMC2>,
611 <&clocks SCLK_FIMC2>;
626 clocks = <&clocks CLK_JPEG>;