Lines Matching full:clocks
39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
46 clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
53 clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
60 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
67 clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
74 clocks = <&clock CLK_DOUT_ACLK333_G2D>;
81 clocks = <&clock CLK_DOUT_ACLK266_G2D>;
87 clocks = <&clock CLK_DOUT_ACLK266>;
94 clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
101 clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
108 clocks = <&clock CLK_DOUT_ACLK166>;
115 clocks = <&clock CLK_DOUT_ACLK333>;
122 clocks = <&clock CLK_DOUT_ACLK400_MSCL>;
129 clocks = <&clock CLK_DOUT_ACLK100_NOC>;
136 clocks = <&clock CLK_DOUT_ACLK66>;
143 clocks = <&clock CLK_DOUT_ACLK400_WCORE>;
295 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
305 clocks = <&clock CLK_MFC>;
318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
330 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
342 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
351 clocks = <&clock CLK_FOUT_SPLL>,
410 clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
422 clocks = <&clock CLK_PCLK_PPMU_DREX0_1>;
434 clocks = <&clock CLK_PCLK_PPMU_DREX1_0>;
446 clocks = <&clock CLK_PCLK_PPMU_DREX1_1>;
545 clocks = <&clock_audss EXYNOS_ADMA>;
555 clocks = <&clock CLK_PDMA0>;
564 clocks = <&clock CLK_PDMA1>;
573 clocks = <&clock CLK_MDMA0>;
582 clocks = <&clock CLK_MDMA1>;
602 clocks = <&clock_audss EXYNOS_I2S_BUS>,
622 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
638 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
659 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
676 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
693 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
705 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
720 clocks = <&clock CLK_USI4>;
733 clocks = <&clock CLK_USI5>;
746 clocks = <&clock CLK_USI6>;
755 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
775 clocks = <&clock CLK_HDMI_CEC>;
788 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
800 clocks = <&clock CLK_ROTATOR>;
809 clocks = <&clock CLK_GSCL0>;
819 clocks = <&clock CLK_GSCL1>;
833 clocks = <&clock CLK_G3D>;
879 clocks = <&clock CLK_MSCL0>;
889 clocks = <&clock CLK_MSCL1>;
899 clocks = <&clock CLK_MSCL2>;
910 clocks = <&clock CLK_JPEG>;
919 clocks = <&clock CLK_JPEG2>;
927 clocks = <&clock CLK_FIN_PLL>;
948 clocks = <&clock CLK_TMU>;
957 clocks = <&clock CLK_TMU>;
966 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
975 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
984 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
995 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1005 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1015 clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>;
1026 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
1037 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1048 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1058 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1068 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1079 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1090 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1101 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1112 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
1122 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
1131 clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
1141 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
1152 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
1163 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1174 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1205 clocks = <&clock CLK_TSADC>;
1211 clocks = <&clock CLK_DP1>;
1220 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1229 clocks = <&clock CLK_G2D>;
1235 clocks = <&clock CLK_I2C0>;
1242 clocks = <&clock CLK_I2C1>;
1249 clocks = <&clock CLK_I2C2>;
1256 clocks = <&clock CLK_I2C3>;
1263 clocks = <&clock CLK_USI0>;
1270 clocks = <&clock CLK_USI1>;
1277 clocks = <&clock CLK_USI2>;
1284 clocks = <&clock CLK_USI3>;
1291 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
1296 clocks = <&clock CLK_SSS>;
1301 clocks = <&clock CLK_PWM>;
1306 clocks = <&clock CLK_RTC>;
1313 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1320 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1327 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1334 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
1341 clocks = <&clock CLK_SSS>;
1346 clocks = <&clock CLK_SSS>;
1351 clocks = <&clock CLK_USBD300>;
1356 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
1362 clocks = <&clock CLK_USBD301>;
1371 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
1377 clocks = <&clock CLK_USBH20>;
1382 clocks = <&clock CLK_USBH20>;
1387 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
1394 clocks = <&clock CLK_WDT>;