Lines Matching full:clock
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
40 clock-names = "bus";
46 clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
47 clock-names = "bus";
53 clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
54 clock-names = "bus";
60 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
61 clock-names = "bus";
67 clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
68 clock-names = "bus";
74 clocks = <&clock CLK_DOUT_ACLK333_G2D>;
75 clock-names = "bus";
81 clocks = <&clock CLK_DOUT_ACLK266_G2D>;
82 clock-names = "bus";
87 clocks = <&clock CLK_DOUT_ACLK266>;
88 clock-names = "bus";
94 clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
95 clock-names = "bus";
101 clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
102 clock-names = "bus";
108 clocks = <&clock CLK_DOUT_ACLK166>;
109 clock-names = "bus";
115 clocks = <&clock CLK_DOUT_ACLK333>;
116 clock-names = "bus";
122 clocks = <&clock CLK_DOUT_ACLK400_MSCL>;
123 clock-names = "bus";
129 clocks = <&clock CLK_DOUT_ACLK100_NOC>;
130 clock-names = "bus";
136 clocks = <&clock CLK_DOUT_ACLK66>;
137 clock-names = "bus";
143 clocks = <&clock CLK_DOUT_ACLK400_WCORE>;
144 clock-names = "bus";
160 clock-latency-ns = <140000>;
165 clock-latency-ns = <140000>;
170 clock-latency-ns = <140000>;
175 clock-latency-ns = <140000>;
180 clock-latency-ns = <140000>;
185 clock-latency-ns = <140000>;
190 clock-latency-ns = <140000>;
195 clock-latency-ns = <140000>;
200 clock-latency-ns = <140000>;
205 clock-latency-ns = <140000>;
210 clock-latency-ns = <140000>;
215 clock-latency-ns = <140000>;
226 clock-latency-ns = <140000>;
231 clock-latency-ns = <140000>;
236 clock-latency-ns = <140000>;
241 clock-latency-ns = <140000>;
246 clock-latency-ns = <140000>;
251 clock-latency-ns = <140000>;
256 clock-latency-ns = <140000>;
261 clock-latency-ns = <140000>;
285 clock: clock-controller@10010000 { label
286 compatible = "samsung,exynos5420-clock", "syscon";
288 #clock-cells = <1>;
291 clock_audss: audss-clock-controller@3810000 {
292 compatible = "samsung,exynos5420-audss-clock";
294 #clock-cells = <1>;
295 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
296 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
297 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
305 clocks = <&clock CLK_MFC>;
306 clock-names = "mfc";
318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
319 clock-names = "biu", "ciu";
330 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
331 clock-names = "biu", "ciu";
342 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
343 clock-names = "biu", "ciu";
351 clocks = <&clock CLK_FOUT_SPLL>,
352 <&clock CLK_MOUT_SCLK_SPLL>,
353 <&clock CLK_FF_DOUT_SPLL2>,
354 <&clock CLK_FOUT_BPLL>,
355 <&clock CLK_MOUT_BPLL>,
356 <&clock CLK_SCLK_BPLL>,
357 <&clock CLK_MOUT_MX_MSPLL_CCORE>,
358 <&clock CLK_MOUT_MCLK_CDREX>;
359 clock-names = "fout_spll",
367 samsung,syscon-clk = <&clock>;
410 clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
411 clock-names = "ppmu";
422 clocks = <&clock CLK_PCLK_PPMU_DREX0_1>;
423 clock-names = "ppmu";
434 clocks = <&clock CLK_PCLK_PPMU_DREX1_0>;
435 clock-names = "ppmu";
446 clocks = <&clock CLK_PCLK_PPMU_DREX1_1>;
447 clock-names = "ppmu";
546 clock-names = "apb_pclk";
555 clocks = <&clock CLK_PDMA0>;
556 clock-names = "apb_pclk";
564 clocks = <&clock CLK_PDMA1>;
565 clock-names = "apb_pclk";
573 clocks = <&clock CLK_MDMA0>;
574 clock-names = "apb_pclk";
582 clocks = <&clock CLK_MDMA1>;
583 clock-names = "apb_pclk";
605 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
606 #clock-cells = <1>;
607 clock-output-names = "i2s_cdclk0";
622 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
623 clock-names = "iis", "i2s_opclk0";
624 #clock-cells = <1>;
625 clock-output-names = "i2s_cdclk1";
638 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
639 clock-names = "iis", "i2s_opclk0";
640 #clock-cells = <1>;
641 clock-output-names = "i2s_cdclk2";
659 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
660 clock-names = "spi", "spi_busclk0";
676 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
677 clock-names = "spi", "spi_busclk0";
693 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
694 clock-names = "spi", "spi_busclk0";
705 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
706 clock-names = "bus_clk", "pll_clk";
720 clocks = <&clock CLK_USI4>;
721 clock-names = "hsi2c";
733 clocks = <&clock CLK_USI5>;
734 clock-names = "hsi2c";
746 clocks = <&clock CLK_USI6>;
747 clock-names = "hsi2c";
755 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
756 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
757 <&clock CLK_MOUT_HDMI>;
758 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
775 clocks = <&clock CLK_HDMI_CEC>;
776 clock-names = "hdmicec";
788 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
789 <&clock CLK_SCLK_HDMI>;
790 clock-names = "mixer", "hdmi", "sclk_hdmi";
800 clocks = <&clock CLK_ROTATOR>;
801 clock-names = "rotator";
809 clocks = <&clock CLK_GSCL0>;
810 clock-names = "gscl";
819 clocks = <&clock CLK_GSCL1>;
820 clock-names = "gscl";
833 clocks = <&clock CLK_G3D>;
834 clock-names = "core";
879 clocks = <&clock CLK_MSCL0>;
880 clock-names = "mscl";
889 clocks = <&clock CLK_MSCL1>;
890 clock-names = "mscl";
899 clocks = <&clock CLK_MSCL2>;
900 clock-names = "mscl";
909 clock-names = "jpeg";
910 clocks = <&clock CLK_JPEG>;
918 clock-names = "jpeg";
919 clocks = <&clock CLK_JPEG2>;
926 clock-names = "clkout16";
927 clocks = <&clock CLK_FIN_PLL>;
928 #clock-cells = <1>;
948 clocks = <&clock CLK_TMU>;
949 clock-names = "tmu_apbif";
957 clocks = <&clock CLK_TMU>;
958 clock-names = "tmu_apbif";
966 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
967 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
975 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
976 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
984 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
985 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
994 clock-names = "sysmmu", "master";
995 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1004 clock-names = "sysmmu", "master";
1005 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1014 clock-names = "sysmmu", "master";
1015 clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>;
1025 clock-names = "sysmmu", "master";
1026 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
1036 clock-names = "sysmmu", "master";
1037 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1047 clock-names = "sysmmu", "master";
1048 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1057 clock-names = "sysmmu", "master";
1058 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1067 clock-names = "sysmmu", "master";
1068 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1078 clock-names = "sysmmu", "master";
1079 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1089 clock-names = "sysmmu", "master";
1090 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1100 clock-names = "sysmmu", "master";
1101 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1111 clock-names = "sysmmu", "master";
1112 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
1121 clock-names = "sysmmu", "master";
1122 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
1130 clock-names = "sysmmu", "master";
1131 clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
1140 clock-names = "sysmmu", "master";
1141 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
1151 clock-names = "sysmmu", "master";
1152 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
1162 clock-names = "sysmmu", "master";
1163 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1173 clock-names = "sysmmu", "master";
1174 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1205 clocks = <&clock CLK_TSADC>;
1206 clock-names = "adc";
1211 clocks = <&clock CLK_DP1>;
1212 clock-names = "dp";
1220 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1221 clock-names = "sclk_fimd", "fimd";
1229 clocks = <&clock CLK_G2D>;
1230 clock-names = "fimg2d";
1235 clocks = <&clock CLK_I2C0>;
1236 clock-names = "i2c";
1242 clocks = <&clock CLK_I2C1>;
1243 clock-names = "i2c";
1249 clocks = <&clock CLK_I2C2>;
1250 clock-names = "i2c";
1256 clocks = <&clock CLK_I2C3>;
1257 clock-names = "i2c";
1263 clocks = <&clock CLK_USI0>;
1264 clock-names = "hsi2c";
1270 clocks = <&clock CLK_USI1>;
1271 clock-names = "hsi2c";
1277 clocks = <&clock CLK_USI2>;
1278 clock-names = "hsi2c";
1284 clocks = <&clock CLK_USI3>;
1285 clock-names = "hsi2c";
1291 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
1292 clock-names = "fin_pll", "mct";
1296 clocks = <&clock CLK_SSS>;
1297 clock-names = "secss";
1301 clocks = <&clock CLK_PWM>;
1302 clock-names = "timers";
1306 clocks = <&clock CLK_RTC>;
1307 clock-names = "rtc";
1313 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1314 clock-names = "uart", "clk_uart_baud0";
1320 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1321 clock-names = "uart", "clk_uart_baud0";
1327 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1328 clock-names = "uart", "clk_uart_baud0";
1334 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
1335 clock-names = "uart", "clk_uart_baud0";
1341 clocks = <&clock CLK_SSS>;
1342 clock-names = "secss";
1346 clocks = <&clock CLK_SSS>;
1347 clock-names = "secss";
1351 clocks = <&clock CLK_USBD300>;
1352 clock-names = "usbdrd30";
1356 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
1357 clock-names = "phy", "ref";
1362 clocks = <&clock CLK_USBD301>;
1363 clock-names = "usbdrd30";
1371 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
1372 clock-names = "phy", "ref";
1377 clocks = <&clock CLK_USBH20>;
1378 clock-names = "usbhost";
1382 clocks = <&clock CLK_USBH20>;
1383 clock-names = "usbhost";
1387 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
1388 clock-names = "phy", "ref";
1394 clocks = <&clock CLK_WDT>;
1395 clock-names = "watchdog";