Lines Matching +full:exynos4212 +full:- +full:hdmiphy
1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
67 #cooling-cells = <2>; /* min followed by max */
71 compatible = "arm,cortex-a15";
74 clock-names = "cpu";
75 operating-points-v2 = <&cpu0_opp_table>;
76 #cooling-cells = <2>; /* min followed by max */
80 cpu0_opp_table: opp-table-0 {
81 compatible = "operating-points-v2";
82 opp-shared;
84 opp-200000000 {
85 opp-hz = /bits/ 64 <200000000>;
86 opp-microvolt = <925000>;
87 clock-latency-ns = <140000>;
89 opp-300000000 {
90 opp-hz = /bits/ 64 <300000000>;
91 opp-microvolt = <937500>;
92 clock-latency-ns = <140000>;
94 opp-400000000 {
95 opp-hz = /bits/ 64 <400000000>;
96 opp-microvolt = <950000>;
97 clock-latency-ns = <140000>;
99 opp-500000000 {
100 opp-hz = /bits/ 64 <500000000>;
101 opp-microvolt = <975000>;
102 clock-latency-ns = <140000>;
104 opp-600000000 {
105 opp-hz = /bits/ 64 <600000000>;
106 opp-microvolt = <1000000>;
107 clock-latency-ns = <140000>;
109 opp-700000000 {
110 opp-hz = /bits/ 64 <700000000>;
111 opp-microvolt = <1012500>;
112 clock-latency-ns = <140000>;
114 opp-800000000 {
115 opp-hz = /bits/ 64 <800000000>;
116 opp-microvolt = <1025000>;
117 clock-latency-ns = <140000>;
119 opp-900000000 {
120 opp-hz = /bits/ 64 <900000000>;
121 opp-microvolt = <1050000>;
122 clock-latency-ns = <140000>;
124 opp-1000000000 {
125 opp-hz = /bits/ 64 <1000000000>;
126 opp-microvolt = <1075000>;
127 clock-latency-ns = <140000>;
128 opp-suspend;
130 opp-1100000000 {
131 opp-hz = /bits/ 64 <1100000000>;
132 opp-microvolt = <1100000>;
133 clock-latency-ns = <140000>;
135 opp-1200000000 {
136 opp-hz = /bits/ 64 <1200000000>;
137 opp-microvolt = <1125000>;
138 clock-latency-ns = <140000>;
140 opp-1300000000 {
141 opp-hz = /bits/ 64 <1300000000>;
142 opp-microvolt = <1150000>;
143 clock-latency-ns = <140000>;
145 opp-1400000000 {
146 opp-hz = /bits/ 64 <1400000000>;
147 opp-microvolt = <1200000>;
148 clock-latency-ns = <140000>;
150 opp-1500000000 {
151 opp-hz = /bits/ 64 <1500000000>;
152 opp-microvolt = <1225000>;
153 clock-latency-ns = <140000>;
155 opp-1600000000 {
156 opp-hz = /bits/ 64 <1600000000>;
157 opp-microvolt = <1250000>;
158 clock-latency-ns = <140000>;
160 opp-1700000000 {
161 opp-hz = /bits/ 64 <1700000000>;
162 opp-microvolt = <1300000>;
163 clock-latency-ns = <140000>;
168 compatible = "arm,cortex-a15-pmu";
169 interrupt-parent = <&combiner>;
175 compatible = "mmio-sram";
177 #address-cells = <1>;
178 #size-cells = <1>;
181 smp-sram@0 {
182 compatible = "samsung,exynos4210-sysram";
186 smp-sram@2f000 {
187 compatible = "samsung,exynos4210-sysram-ns";
192 pd_gsc: power-domain@10044000 {
193 compatible = "samsung,exynos4210-pd";
195 #power-domain-cells = <0>;
199 pd_mfc: power-domain@10044040 {
200 compatible = "samsung,exynos4210-pd";
202 #power-domain-cells = <0>;
206 pd_g3d: power-domain@10044060 {
207 compatible = "samsung,exynos4210-pd";
209 #power-domain-cells = <0>;
213 pd_disp1: power-domain@100440a0 {
214 compatible = "samsung,exynos4210-pd";
216 #power-domain-cells = <0>;
220 pd_mau: power-domain@100440c0 {
221 compatible = "samsung,exynos4210-pd";
223 #power-domain-cells = <0>;
227 clock: clock-controller@10010000 {
228 compatible = "samsung,exynos5250-clock";
230 #clock-cells = <1>;
233 clock_audss: audss-clock-controller@3810000 {
234 compatible = "samsung,exynos5250-audss-clock";
236 #clock-cells = <1>;
239 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
240 power-domains = <&pd_mau>;
244 compatible = "samsung,exynos5250-mct",
245 "samsung,exynos4210-mct";
248 clock-names = "fin_pll", "mct";
249 interrupts-extended = <&combiner 23 3>,
258 compatible = "samsung,exynos5250-pinctrl";
262 wakup_eint: wakeup-interrupt-controller {
263 compatible = "samsung,exynos4210-wakeup-eint";
264 interrupt-parent = <&gic>;
270 compatible = "samsung,exynos5250-pinctrl";
276 compatible = "samsung,exynos5250-pinctrl";
282 compatible = "samsung,exynos5250-pinctrl";
285 power-domains = <&pd_mau>;
288 pmu_system_controller: system-controller@10040000 {
289 compatible = "samsung,exynos5250-pmu", "simple-mfd", "syscon";
291 clock-names = "clkout16";
293 #clock-cells = <1>;
294 interrupt-controller;
295 #interrupt-cells = <3>;
296 interrupt-parent = <&gic>;
298 dp_phy: dp-phy {
299 compatible = "samsung,exynos5250-dp-video-phy";
300 #phy-cells = <0>;
303 mipi_phy: mipi-phy {
304 compatible = "samsung,s5pv210-mipi-video-phy";
305 #phy-cells = <1>;
310 compatible = "samsung,exynos5250-wdt";
314 clock-names = "watchdog";
315 samsung,syscon-phandle = <&pmu_system_controller>;
319 compatible = "samsung,mfc-v6";
322 power-domains = <&pd_mfc>;
324 clock-names = "mfc";
326 iommu-names = "left", "right";
330 compatible = "samsung,exynos5250-rotator";
334 clock-names = "rotator";
339 compatible = "samsung,exynos5250-mali", "arm,mali-t604";
344 interrupt-names = "job", "mmu", "gpu";
346 clock-names = "core";
347 operating-points-v2 = <&gpu_opp_table>;
348 power-domains = <&pd_g3d>;
351 gpu_opp_table: opp-table {
352 compatible = "operating-points-v2";
354 opp-100000000 {
355 opp-hz = /bits/ 64 <100000000>;
356 opp-microvolt = <925000>;
358 opp-160000000 {
359 opp-hz = /bits/ 64 <160000000>;
360 opp-microvolt = <925000>;
362 opp-266000000 {
363 opp-hz = /bits/ 64 <266000000>;
364 opp-microvolt = <1025000>;
366 opp-350000000 {
367 opp-hz = /bits/ 64 <350000000>;
368 opp-microvolt = <1075000>;
370 opp-400000000 {
371 opp-hz = /bits/ 64 <400000000>;
372 opp-microvolt = <1125000>;
374 opp-450000000 {
375 opp-hz = /bits/ 64 <450000000>;
376 opp-microvolt = <1150000>;
378 opp-533000000 {
379 opp-hz = /bits/ 64 <533000000>;
380 opp-microvolt = <1250000>;
386 compatible = "samsung,exynos5250-tmu";
390 clock-names = "tmu_apbif";
391 #thermal-sensor-cells = <0>;
395 compatible = "snps,dwc-ahci";
399 clock-names = "sata", "pclk";
401 phy-names = "sata-phy";
402 ports-implemented = <0x1>;
406 sata_phy: sata-phy@12170000 {
407 compatible = "samsung,exynos5250-sata-phy";
410 clock-names = "sata_phyctrl";
411 #phy-cells = <0>;
412 samsung,syscon-phandle = <&pmu_system_controller>;
416 /* i2c_0-3 are defined in exynos5.dtsi */
418 compatible = "samsung,s3c2440-i2c";
421 #address-cells = <1>;
422 #size-cells = <0>;
424 clock-names = "i2c";
425 pinctrl-names = "default";
426 pinctrl-0 = <&i2c4_bus>;
431 compatible = "samsung,s3c2440-i2c";
434 #address-cells = <1>;
435 #size-cells = <0>;
437 clock-names = "i2c";
438 pinctrl-names = "default";
439 pinctrl-0 = <&i2c5_bus>;
444 compatible = "samsung,s3c2440-i2c";
447 #address-cells = <1>;
448 #size-cells = <0>;
450 clock-names = "i2c";
451 pinctrl-names = "default";
452 pinctrl-0 = <&i2c6_bus>;
457 compatible = "samsung,s3c2440-i2c";
460 #address-cells = <1>;
461 #size-cells = <0>;
463 clock-names = "i2c";
464 pinctrl-names = "default";
465 pinctrl-0 = <&i2c7_bus>;
470 compatible = "samsung,s3c2440-hdmiphy-i2c";
473 #address-cells = <1>;
474 #size-cells = <0>;
476 clock-names = "i2c";
479 hdmiphy: hdmi-phy@38 { label
480 compatible = "samsung,exynos4212-hdmiphy";
486 compatible = "samsung,exynos5-sata-phy-i2c";
488 #address-cells = <1>;
489 #size-cells = <0>;
491 clock-names = "i2c";
494 sata_phy_i2c: sata-phy-i2c@38 {
495 compatible = "samsung,exynos-sataphy-i2c";
502 compatible = "samsung,exynos4210-spi";
507 dma-names = "tx", "rx";
508 #address-cells = <1>;
509 #size-cells = <0>;
511 clock-names = "spi", "spi_busclk0";
512 pinctrl-names = "default";
513 pinctrl-0 = <&spi0_bus>;
517 compatible = "samsung,exynos4210-spi";
522 dma-names = "tx", "rx";
523 #address-cells = <1>;
524 #size-cells = <0>;
526 clock-names = "spi", "spi_busclk0";
527 pinctrl-names = "default";
528 pinctrl-0 = <&spi1_bus>;
532 compatible = "samsung,exynos4210-spi";
537 dma-names = "tx", "rx";
538 #address-cells = <1>;
539 #size-cells = <0>;
541 clock-names = "spi", "spi_busclk0";
542 pinctrl-names = "default";
543 pinctrl-0 = <&spi2_bus>;
547 compatible = "samsung,exynos5250-dw-mshc";
549 #address-cells = <1>;
550 #size-cells = <0>;
553 clock-names = "biu", "ciu";
554 fifo-depth = <0x80>;
559 compatible = "samsung,exynos5250-dw-mshc";
561 #address-cells = <1>;
562 #size-cells = <0>;
565 clock-names = "biu", "ciu";
566 fifo-depth = <0x80>;
571 compatible = "samsung,exynos5250-dw-mshc";
573 #address-cells = <1>;
574 #size-cells = <0>;
577 clock-names = "biu", "ciu";
578 fifo-depth = <0x80>;
583 compatible = "samsung,exynos5250-dw-mshc";
586 #address-cells = <1>;
587 #size-cells = <0>;
589 clock-names = "biu", "ciu";
590 fifo-depth = <0x80>;
595 compatible = "samsung,s5pv210-i2s";
601 dma-names = "tx", "rx", "tx-sec";
605 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
606 samsung,idma-addr = <0x03000000>;
607 pinctrl-names = "default";
608 pinctrl-0 = <&i2s0_bus>;
609 power-domains = <&pd_mau>;
610 #clock-cells = <1>;
611 #sound-dai-cells = <1>;
615 compatible = "samsung,s3c6410-i2s";
620 dma-names = "tx", "rx";
622 clock-names = "iis", "i2s_opclk0";
623 pinctrl-names = "default";
624 pinctrl-0 = <&i2s1_bus>;
625 power-domains = <&pd_mau>;
626 #sound-dai-cells = <1>;
630 compatible = "samsung,s3c6410-i2s";
635 dma-names = "tx", "rx";
637 clock-names = "iis", "i2s_opclk0";
638 pinctrl-names = "default";
639 pinctrl-0 = <&i2s2_bus>;
640 power-domains = <&pd_mau>;
641 #sound-dai-cells = <1>;
645 compatible = "samsung,exynos5250-dwusb3";
647 clock-names = "usbdrd30";
648 #address-cells = <1>;
649 #size-cells = <1>;
657 phy-names = "usb2-phy", "usb3-phy";
662 compatible = "samsung,exynos5250-usbdrd-phy";
665 clock-names = "phy", "ref";
666 samsung,pmu-syscon = <&pmu_system_controller>;
667 #phy-cells = <1>;
671 compatible = "samsung,exynos4210-ehci";
676 clock-names = "usbhost";
678 phy-names = "host";
682 compatible = "samsung,exynos4210-ohci";
687 clock-names = "usbhost";
689 phy-names = "host";
693 compatible = "samsung,exynos5250-usb2-phy";
696 clock-names = "phy", "ref";
697 #phy-cells = <1>;
698 samsung,sysreg-phandle = <&sysreg_system_controller>;
699 samsung,pmureg-phandle = <&pmu_system_controller>;
702 pdma0: dma-controller@121a0000 {
707 clock-names = "apb_pclk";
708 #dma-cells = <1>;
711 pdma1: dma-controller@121b0000 {
716 clock-names = "apb_pclk";
717 #dma-cells = <1>;
720 mdma0: dma-controller@10800000 {
725 clock-names = "apb_pclk";
726 #dma-cells = <1>;
729 mdma1: dma-controller@11c10000 {
734 clock-names = "apb_pclk";
735 #dma-cells = <1>;
739 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
742 power-domains = <&pd_gsc>;
744 clock-names = "gscl";
749 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
752 power-domains = <&pd_gsc>;
754 clock-names = "gscl";
759 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
762 power-domains = <&pd_gsc>;
764 clock-names = "gscl";
769 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
772 power-domains = <&pd_gsc>;
774 clock-names = "gscl";
779 compatible = "samsung,exynos4212-hdmi";
781 power-domains = <&pd_disp1>;
786 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
788 samsung,syscon-phandle = <&pmu_system_controller>;
789 phy = <&hdmiphy>;
790 #sound-dai-cells = <0>;
795 compatible = "samsung,s5p-cec";
799 clock-names = "hdmicec";
800 samsung,syscon-phandle = <&pmu_system_controller>;
801 hdmi-phandle = <&hdmi>;
802 pinctrl-names = "default";
803 pinctrl-0 = <&hdmi_cec>;
808 compatible = "samsung,exynos5250-mixer";
810 power-domains = <&pd_disp1>;
814 clock-names = "mixer", "hdmi", "sclk_hdmi";
820 compatible = "samsung,exynos4210-mipi-dsi";
823 samsung,power-domain = <&pd_disp1>;
825 phy-names = "dsim";
827 clock-names = "bus_clk", "sclk_mipi";
829 #address-cells = <1>;
830 #size-cells = <0>;
834 compatible = "samsung,exynos-adc-v1";
838 clock-names = "adc";
839 #io-channel-cells = <1>;
840 samsung,syscon-phandle = <&pmu_system_controller>;
845 compatible = "samsung,exynos-sysmmu";
847 interrupt-parent = <&combiner>;
849 clock-names = "sysmmu", "master";
851 #iommu-cells = <0>;
855 compatible = "samsung,exynos-sysmmu";
857 interrupt-parent = <&combiner>;
859 power-domains = <&pd_mfc>;
860 clock-names = "sysmmu", "master";
862 #iommu-cells = <0>;
866 compatible = "samsung,exynos-sysmmu";
868 interrupt-parent = <&combiner>;
870 power-domains = <&pd_mfc>;
871 clock-names = "sysmmu", "master";
873 #iommu-cells = <0>;
877 compatible = "samsung,exynos-sysmmu";
879 interrupt-parent = <&combiner>;
881 clock-names = "sysmmu", "master";
883 #iommu-cells = <0>;
887 compatible = "samsung,exynos-sysmmu";
889 interrupt-parent = <&combiner>;
891 power-domains = <&pd_gsc>;
892 clock-names = "sysmmu", "master";
894 #iommu-cells = <0>;
898 compatible = "samsung,exynos-sysmmu";
900 interrupt-parent = <&combiner>;
902 clock-names = "sysmmu";
904 #iommu-cells = <0>;
908 compatible = "samsung,exynos-sysmmu";
910 interrupt-parent = <&combiner>;
912 clock-names = "sysmmu";
914 #iommu-cells = <0>;
918 compatible = "samsung,exynos-sysmmu";
920 interrupt-parent = <&combiner>;
922 clock-names = "sysmmu";
924 #iommu-cells = <0>;
928 compatible = "samsung,exynos-sysmmu";
930 interrupt-parent = <&combiner>;
932 clock-names = "sysmmu";
934 #iommu-cells = <0>;
938 compatible = "samsung,exynos-sysmmu";
940 interrupt-parent = <&combiner>;
942 clock-names = "sysmmu";
944 #iommu-cells = <0>;
948 compatible = "samsung,exynos-sysmmu";
950 interrupt-parent = <&combiner>;
952 clock-names = "sysmmu";
954 #iommu-cells = <0>;
958 compatible = "samsung,exynos-sysmmu";
960 interrupt-parent = <&combiner>;
962 clock-names = "sysmmu";
964 #iommu-cells = <0>;
968 compatible = "samsung,exynos-sysmmu";
970 interrupt-parent = <&combiner>;
972 clock-names = "sysmmu";
974 #iommu-cells = <0>;
978 compatible = "samsung,exynos-sysmmu";
980 interrupt-parent = <&combiner>;
982 clock-names = "sysmmu";
984 #iommu-cells = <0>;
988 compatible = "samsung,exynos-sysmmu";
990 interrupt-parent = <&combiner>;
992 clock-names = "sysmmu";
994 #iommu-cells = <0>;
998 compatible = "samsung,exynos-sysmmu";
1000 interrupt-parent = <&combiner>;
1002 power-domains = <&pd_gsc>;
1003 clock-names = "sysmmu", "master";
1005 #iommu-cells = <0>;
1009 compatible = "samsung,exynos-sysmmu";
1011 interrupt-parent = <&combiner>;
1013 power-domains = <&pd_gsc>;
1014 clock-names = "sysmmu", "master";
1016 #iommu-cells = <0>;
1020 compatible = "samsung,exynos-sysmmu";
1022 interrupt-parent = <&combiner>;
1024 power-domains = <&pd_gsc>;
1025 clock-names = "sysmmu", "master";
1027 #iommu-cells = <0>;
1031 compatible = "samsung,exynos-sysmmu";
1033 interrupt-parent = <&combiner>;
1035 power-domains = <&pd_gsc>;
1036 clock-names = "sysmmu", "master";
1038 #iommu-cells = <0>;
1042 compatible = "samsung,exynos-sysmmu";
1044 interrupt-parent = <&combiner>;
1046 power-domains = <&pd_gsc>;
1047 clock-names = "sysmmu", "master";
1049 #iommu-cells = <0>;
1053 compatible = "samsung,exynos-sysmmu";
1055 interrupt-parent = <&combiner>;
1057 power-domains = <&pd_gsc>;
1058 clock-names = "sysmmu", "master";
1060 #iommu-cells = <0>;
1064 compatible = "samsung,exynos-sysmmu";
1066 interrupt-parent = <&combiner>;
1068 power-domains = <&pd_disp1>;
1069 clock-names = "sysmmu", "master";
1071 #iommu-cells = <0>;
1075 compatible = "samsung,exynos-sysmmu";
1077 interrupt-parent = <&combiner>;
1079 power-domains = <&pd_disp1>;
1080 clock-names = "sysmmu", "master";
1082 #iommu-cells = <0>;
1087 compatible = "arm,armv7-timer";
1094 * of U-Boot on Exynos don't set the CNTFRQ register,
1097 clock-frequency = <24000000>;
1102 polling-delay-passive = <0>;
1103 polling-delay = <0>;
1104 thermal-sensors = <&tmu>;
1106 cooling-maps {
1109 cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
1113 cooling-device = <&cpu0 15 15>,
1120 power-domains = <&pd_disp1>;
1122 clock-names = "dp";
1124 phy-names = "dp";
1128 power-domains = <&pd_disp1>;
1130 clock-names = "sclk_fimd", "fimd";
1137 clock-names = "fimg2d";
1143 clock-names = "i2c";
1144 pinctrl-names = "default";
1145 pinctrl-0 = <&i2c0_bus>;
1150 clock-names = "i2c";
1151 pinctrl-names = "default";
1152 pinctrl-0 = <&i2c1_bus>;
1157 clock-names = "i2c";
1158 pinctrl-names = "default";
1159 pinctrl-0 = <&i2c2_bus>;
1164 clock-names = "i2c";
1165 pinctrl-names = "default";
1166 pinctrl-0 = <&i2c3_bus>;
1171 clock-names = "secss";
1176 clock-names = "timers";
1181 clock-names = "rtc";
1182 interrupt-parent = <&pmu_system_controller>;
1188 clock-names = "uart", "clk_uart_baud0";
1190 dma-names = "rx", "tx";
1195 clock-names = "uart", "clk_uart_baud0";
1197 dma-names = "rx", "tx";
1202 clock-names = "uart", "clk_uart_baud0";
1204 dma-names = "rx", "tx";
1209 clock-names = "uart", "clk_uart_baud0";
1211 dma-names = "rx", "tx";
1216 clock-names = "secss";
1221 clock-names = "secss";
1224 #include "exynos5250-pinctrl.dtsi"
1225 #include "exynos-syscon-restart.dtsi"