Lines Matching +full:0 +full:x10030000
70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x1000>;
231 interrupts = <10 0>;
236 reg = <0x106e0000 0x1000>;
242 reg = <0x02020000 0x40000>;
245 ranges = <0 0x02020000 0x40000>;
247 smp-sram@0 {
249 reg = <0x0 0x1000>;
254 reg = <0x2f000 0x1000>;
260 reg = <0x10023ca0 0x20>;
261 #power-domain-cells = <0>;
267 reg = <0x10502000 0x1000>;
275 arm,double-linefill-incr = <0>;
282 reg = <0x10030000 0x18000>;
288 reg = <0x10048000 0x1000>;
298 reg = <0x10050000 0x800>;
310 reg = <0x10060000 0x100>;
319 reg = <0x126c0000 0x100>;
331 reg = <0x10800000 0x1000>;
340 reg = <0x12550000 0x1000>;
343 #size-cells = <0>;
344 fifo-depth = <0x80>;
352 reg = <0x10a40000 0x1000>;
357 #iommu-cells = <0>;
362 reg = <0x12260000 0x1000>;
368 #iommu-cells = <0>;
373 reg = <0x12270000 0x1000>;
379 #iommu-cells = <0>;
384 reg = <0x122a0000 0x1000>;
390 #iommu-cells = <0>;
395 reg = <0x122b0000 0x1000>;
401 #iommu-cells = <0>;
406 reg = <0x123b0000 0x1000>;
408 interrupts = <16 0>;
413 #iommu-cells = <0>;
418 reg = <0x123c0000 0x1000>;
425 #iommu-cells = <0>;
431 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
454 ranges = <0x0 0x11800000 0xba1000>;
459 /* fimc_[0-3] are configured outside, under phandles */
462 reg = <0x00b90000 0x1000>;
473 reg = <0x00ba0000 0x1000>;
484 reg = <0x00800000 0x260000>;
528 reg = <0x00940000 0x100>;
532 #size-cells = <0>;
570 samsung,rotators = <0>;
656 reg = <0x100c0000 0x100>;