Lines Matching +full:0 +full:x20070000
39 #clock-cells = <0>;
45 reg = <0x10090000 0x10000>;
56 reg = <0x10104000 0x800>;
68 reg = <0x10138000 0x1000>;
75 reg = <0x1013c000 0x100>;
80 reg = <0x1013c200 0x20>;
94 reg = <0x1013c600 0x20>;
103 reg = <0x1013d000 0x1000>,
104 <0x1013c100 0x0100>;
109 reg = <0x10124000 0x400>;
120 reg = <0x10126000 0x400>;
131 reg = <0x1012d000 0x20>;
136 reg = <0x1012e000 0x20>;
141 reg = <0x1012f000 0x20>;
146 reg = <0x1012f080 0x20>;
151 reg = <0x1012f100 0x20>;
156 reg = <0x1012f180 0x20>;
161 reg = <0x1012f200 0x20>;
166 reg = <0x1012f280 0x20>;
171 reg = <0x10180000 0x40000>;
186 reg = <0x101c0000 0x40000>;
198 reg = <0x10204000 0x3c>;
213 reg = <0x10214000 0x1000>;
227 reg = <0x10218000 0x1000>;
241 reg = <0x1021c000 0x1000>;
255 reg = <0x10500000 0x4000>;
264 reg = <0x20004000 0x100>;
268 offset = <0x40>;
278 reg = <0x20008000 0x200>;
283 reg = <0x20018000 0x4000>;
284 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
295 reg = <0x2001c000 0x4000>;
296 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
308 reg = <0x2002d000 0x1000>;
311 #size-cells = <0>;
323 reg = <0x2002f000 0x1000>;
326 #size-cells = <0>;
338 reg = <0x20030000 0x10>;
346 reg = <0x20030010 0x10>;
354 reg = <0x2004c000 0x100>;
362 reg = <0x20050020 0x10>;
370 reg = <0x20050030 0x10>;
378 reg = <0x20056000 0x1000>;
381 #size-cells = <0>;
393 reg = <0x2005a000 0x1000>;
396 #size-cells = <0>;
408 reg = <0x2005e000 0x1000>;
411 #size-cells = <0>;
423 reg = <0x20064000 0x400>;
434 reg = <0x20068000 0x400>;
445 reg = <0x2006c000 0x100>;
460 reg = <0x20070000 0x1000>;
462 #size-cells = <0>;
473 reg = <0x20074000 0x1000>;
475 #size-cells = <0>;
483 reg = <0x20078000 0x4000>;