Lines Matching +full:r9a06g032 +full:- +full:pinctrl
1 // SPDX-License-Identifier: GPL-2.0
3 * Base Device Tree Source for the Renesas RZ/N1D (R9A06G032)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
13 compatible = "renesas,r9a06g032";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <40000000>;
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <0>;
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 interrupt-parent = <&gic>;
70 compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc";
75 interrupt-names = "alarm", "timer", "pps";
77 clock-names = "hclk";
78 power-domains = <&sysctrl>;
83 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
91 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
98 sysctrl: system-controller@4000c000 {
99 compatible = "renesas,r9a06g032-sysctrl";
102 #clock-cells = <1>;
103 #power-domain-cells = <0>;
107 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
108 #address-cells = <1>;
109 #size-cells = <1>;
111 dmamux: dma-router@a0 {
112 compatible = "renesas,rzn1-dmamux";
114 #dma-cells = <6>;
115 dma-requests = <32>;
116 dma-masters = <&dma0 &dma1>;
121 compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";
127 clock-names = "hclkf", "hclkpm";
128 power-domains = <&sysctrl>;
133 compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
138 clock-names = "hclkh", "hclkpm", "pciclk";
139 power-domains = <&sysctrl>;
145 bus-range = <0 0>;
146 #address-cells = <3>;
147 #size-cells = <2>;
148 #interrupt-cells = <1>;
152 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
154 dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
155 interrupt-map-mask = <0xf800 0 0 0x7>;
156 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
163 phy-names = "usb";
169 phy-names = "usb";
174 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
177 reg-shift = <2>;
178 reg-io-width = <4>;
180 clock-names = "baudclk", "apb_pclk";
185 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
188 reg-shift = <2>;
189 reg-io-width = <4>;
191 clock-names = "baudclk", "apb_pclk";
196 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
199 reg-shift = <2>;
200 reg-io-width = <4>;
202 clock-names = "baudclk", "apb_pclk";
207 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
210 reg-shift = <2>;
211 reg-io-width = <4>;
213 clock-names = "baudclk", "apb_pclk";
215 dma-names = "rx", "tx";
220 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
223 reg-shift = <2>;
224 reg-io-width = <4>;
226 clock-names = "baudclk", "apb_pclk";
228 dma-names = "rx", "tx";
233 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
236 reg-shift = <2>;
237 reg-io-width = <4>;
239 clock-names = "baudclk", "apb_pclk";
241 dma-names = "rx", "tx";
246 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
249 reg-shift = <2>;
250 reg-io-width = <4>;
252 clock-names = "baudclk", "apb_pclk";
254 dma-names = "rx", "tx";
259 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
262 reg-shift = <2>;
263 reg-io-width = <4>;
265 clock-names = "baudclk", "apb_pclk";
267 dma-names = "rx", "tx";
271 pinctrl: pinctrl@40067000 {
272 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
275 clock-names = "bus";
279 nand_controller: nand-controller@40102000 {
280 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
284 clock-names = "hclk", "eclk";
285 power-domains = <&sysctrl>;
286 #address-cells = <1>;
287 #size-cells = <0>;
291 dma0: dma-controller@40104000 {
292 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
295 clock-names = "hclk";
297 dma-channels = <8>;
298 dma-requests = <16>;
299 dma-masters = <1>;
300 #dma-cells = <3>;
302 data-width = <8>;
305 dma1: dma-controller@40105000 {
306 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
309 clock-names = "hclk";
311 dma-channels = <8>;
312 dma-requests = <16>;
313 dma-masters = <1>;
314 #dma-cells = <3>;
316 data-width = <8>;
320 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
322 interrupt-parent = <&gic>;
326 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
328 clock-names = "stmmaceth";
329 power-domains = <&sysctrl>;
330 snps,multicast-filter-bins = <256>;
331 snps,perfect-filter-entries = <128>;
332 tx-fifo-depth = <2048>;
333 rx-fifo-depth = <4096>;
337 eth_miic: eth-miic@44030000 {
338 compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
339 #address-cells = <1>;
340 #size-cells = <0>;
346 clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
347 power-domains = <&sysctrl>;
350 mii_conv1: mii-conv@1 {
355 mii_conv2: mii-conv@2 {
360 mii_conv3: mii-conv@3 {
365 mii_conv4: mii-conv@4 {
370 mii_conv5: mii-conv@5 {
377 compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
381 clock-names = "hclk", "clk";
382 power-domains = <&sysctrl>;
385 ethernet-ports {
386 #address-cells = <1>;
387 #size-cells = <0>;
391 pcs-handle = <&mii_conv5>;
397 pcs-handle = <&mii_conv4>;
403 pcs-handle = <&mii_conv3>;
409 pcs-handle = <&mii_conv2>;
417 phy-mode = "internal";
419 fixed-link {
421 full-duplex;
427 gic: interrupt-controller@44101000 {
428 compatible = "arm,gic-400", "arm,cortex-a7-gic";
429 interrupt-controller;
430 #interrupt-cells = <3>;
440 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
442 reg-io-width = <4>;
445 power-domains = <&sysctrl>;
450 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
452 reg-io-width = <4>;
455 power-domains = <&sysctrl>;
461 compatible = "arm,armv7-timer";
462 interrupt-parent = <&gic>;
463 arm,cpu-registers-not-fw-configured;
464 always-on;
472 usbphy: usb-phy {
473 #phy-cells = <0>;
474 compatible = "usb-nop-xceiv";