Lines Matching +full:0 +full:x40006000
19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
71 reg = <0x40006000 0x1000>;
84 reg = <0x40008000 0x1000>;
92 reg = <0x40009000 0x1000>;
100 reg = <0x4000c000 0x1000>;
103 #power-domain-cells = <0>;
113 reg = <0xa0 4>;
122 reg = <0x4001e000 0x2000>;
140 reg = <0x40030000 0xc00>,
141 <0x40020000 0x1100>;
145 bus-range = <0 0>;
149 ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>;
154 dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
155 interrupt-map-mask = <0xf800 0 0 0x7>;
156 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
157 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
158 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
160 usb@1,0 {
161 reg = <0x800 0 0 0 0>;
166 usb@2,0 {
167 reg = <0x1000 0 0 0 0>;
175 reg = <0x40060000 0x400>;
186 reg = <0x40061000 0x400>;
197 reg = <0x40062000 0x400>;
208 reg = <0x50000000 0x400>;
214 dmas = <&dmamux 0 0 0 0 0 1>, <&dmamux 1 0 0 0 1 1>;
221 reg = <0x50001000 0x400>;
227 dmas = <&dmamux 2 0 0 0 2 1>, <&dmamux 3 0 0 0 3 1>;
234 reg = <0x50002000 0x400>;
240 dmas = <&dmamux 4 0 0 0 4 1>, <&dmamux 5 0 0 0 5 1>;
247 reg = <0x50003000 0x400>;
253 dmas = <&dmamux 6 0 0 0 6 1>, <&dmamux 7 0 0 0 7 1>;
260 reg = <0x50004000 0x400>;
266 dmas = <&dmamux 4 0 0 0 20 1>, <&dmamux 5 0 0 0 21 1>;
273 reg = <0x40067000 0x1000>, <0x51000000 0x480>;
281 reg = <0x40102000 0x2000>;
287 #size-cells = <0>;
293 reg = <0x40104000 0x1000>;
301 block_size = <0xfff>;
307 reg = <0x40105000 0x1000>;
315 block_size = <0xfff>;
321 reg = <0x44002000 0x2000>;
340 #size-cells = <0>;
341 reg = <0x44030000 0x10000>;
378 reg = <0x44050000 0x10000>;
387 #size-cells = <0>;
389 switch_port0: port@0 {
390 reg = <0>;
431 reg = <0x44101000 0x1000>, /* Distributer */
432 <0x44102000 0x2000>, /* CPU interface */
433 <0x44104000 0x2000>, /* Virt interface control */
434 <0x44106000 0x2000>; /* Virt CPU interface */
441 reg = <0x52104000 0x800>;
451 reg = <0x52105000 0x800>;
473 #phy-cells = <0>;