Lines Matching +full:miic +full:- +full:input

1 // SPDX-License-Identifier: GPL-2.0
3  * Device Tree Source for the RZN1D-EB Board
5  * Copyright (C) 2023 Schneider-Electric
9 #include <dt-bindings/leds/common.h>
10 #include "r9a06g032-rzn1d400-db.dts"
13 	model = "RZN1D-EB Board";
14 	compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
19 	pinctrl-0 = <&pins_eth0>, <&pins_mdio0>;
20 	pinctrl-names = "default";
23 	phy-mode = "rgmii-id";
24 	phy-handle = <&phy_mii0>;
27 		#address-cells = <1>;
28 		#size-cells = <0>;
29 		compatible = "snps,dwmac-mdio";
31 		phy_mii0: ethernet-phy@8 {
35 				#address-cells = <1>;
36 				#size-cells = <0>;
42 					default-state = "keep";
49 					default-state = "keep";
65 	renesas,miic-input = <MIIC_GMAC1_PORT>;
70 	renesas,miic-input = <MIIC_SWITCH_PORTD>;
75 	renesas,miic-input = <MIIC_SWITCH_PORTC>;
84 	pins_eth0: pins-eth0 {
97 		drive-strength = <6>;
98 		bias-disable;
101 	pins_eth1: pins-eth1 {
114 		drive-strength = <6>;
115 		bias-disable;
118 	pins_eth2: pins-eth2 {
131 		drive-strength = <6>;
132 		bias-disable;
135 	pins_mdio0: pins-mdio0 {
140 	pins_sdio1: pins-sdio1 {
150 	pins_sdio1_clk: pins-sdio1-clk {
152 		drive-strength = <12>;
155 	pins_uart2: pins-uart2 {
160 		bias-disable;
165 	pinctrl-0 = <&pins_sdio1>, <&pins_sdio1_clk>;
166 	pinctrl-names = "default";
172 	pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
177 		switch0phy1: ethernet-phy@1 {
181 				#address-cells = <1>;
182 				#size-cells = <0>;
188 					default-state = "keep";
195 					default-state = "keep";
200 		switch0phy10: ethernet-phy@10 {
204 				#address-cells = <1>;
205 				#size-cells = <0>;
211 					default-state = "keep";
218 					default-state = "keep";
227 	phy-mode = "rgmii-id";
228 	phy-handle = <&switch0phy10>;
234 	phy-mode = "rgmii-id";
235 	phy-handle = <&switch0phy1>;
240 	pinctrl-0 = <&pins_uart2>;
241 	pinctrl-names = "default";
243 	uart-has-rtscts;