Lines Matching +full:0 +full:xee080000
34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
66 cpu0: cpu@0 {
69 reg = <0>;
88 L2_CA7: cache-controller-0 {
99 #clock-cells = <0>;
101 clock-frequency = <0>;
114 #clock-cells = <0>;
116 clock-frequency = <0>;
130 reg = <0 0xe6020000 0 0x0c>;
141 reg = <0 0xe6050000 0 0x50>;
145 gpio-ranges = <&pfc 0 0 32>;
156 reg = <0 0xe6051000 0 0x50>;
160 gpio-ranges = <&pfc 0 32 26>;
171 reg = <0 0xe6052000 0 0x50>;
175 gpio-ranges = <&pfc 0 64 32>;
186 reg = <0 0xe6053000 0 0x50>;
190 gpio-ranges = <&pfc 0 96 32>;
201 reg = <0 0xe6054000 0 0x50>;
205 gpio-ranges = <&pfc 0 128 32>;
216 reg = <0 0xe6055000 0 0x50>;
220 gpio-ranges = <&pfc 0 160 28>;
231 reg = <0 0xe6055400 0 0x50>;
235 gpio-ranges = <&pfc 0 192 26>;
245 reg = <0 0xe6060000 0 0x11c>;
250 reg = <0 0xe6150000 0 0x1000>;
254 #power-domain-cells = <0>;
260 reg = <0 0xe6151000 0 0x188>;
266 reg = <0 0xe6160000 0 0x0100>;
271 reg = <0 0xe6180000 0 0x0200>;
279 reg = <0 0xe61c0000 0 0x200>;
280 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
298 reg = <0 0xe6280000 0 0x1000>;
308 reg = <0 0xe6290000 0 0x1000>;
317 reg = <0 0xe6740000 0 0x1000>;
327 reg = <0 0xec680000 0 0x1000>;
336 reg = <0 0xfe951000 0 0x1000>;
346 reg = <0 0xe62a0000 0 0x1000>;
355 reg = <0 0xe63a0000 0 0x12000>;
358 ranges = <0 0 0xe63a0000 0x12000>;
363 reg = <0 0xe63c0000 0 0x1000>;
366 ranges = <0 0 0xe63c0000 0x1000>;
368 smp-sram@0 {
370 reg = <0 0x100>;
380 reg = <0 0xe6508000 0 0x40>;
386 #size-cells = <0>;
394 reg = <0 0xe6518000 0 0x40>;
400 #size-cells = <0>;
408 reg = <0 0xe6530000 0 0x40>;
414 #size-cells = <0>;
422 reg = <0 0xe6540000 0 0x40>;
428 #size-cells = <0>;
436 reg = <0 0xe6520000 0 0x40>;
442 #size-cells = <0>;
450 reg = <0 0xe6528000 0 0x40>;
456 #size-cells = <0>;
465 reg = <0 0xe6500000 0 0x425>;
468 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
469 <&dmac1 0x61>, <&dmac1 0x62>;
474 #size-cells = <0>;
482 reg = <0 0xe6510000 0 0x425>;
485 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
486 <&dmac1 0x65>, <&dmac1 0x66>;
491 #size-cells = <0>;
498 reg = <0 0xe6590000 0 0x100>;
512 reg = <0 0xe6590100 0 0x100>;
514 #size-cells = <0>;
521 usb0: usb-phy@0 {
522 reg = <0>;
534 reg = <0 0xe6700000 0 0x20000>;
567 reg = <0 0xe6720000 0 0x20000>;
600 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
607 #size-cells = <0>;
613 reg = <0 0xe6b10000 0 0x2c>;
616 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
617 <&dmac1 0x17>, <&dmac1 0x18>;
623 #size-cells = <0>;
630 reg = <0 0xe6c40000 0 64>;
634 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
635 <&dmac1 0x21>, <&dmac1 0x22>;
645 reg = <0 0xe6c50000 0 64>;
649 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
650 <&dmac1 0x25>, <&dmac1 0x26>;
660 reg = <0 0xe6c60000 0 64>;
664 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
665 <&dmac1 0x27>, <&dmac1 0x28>;
675 reg = <0 0xe6c70000 0 64>;
679 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
680 <&dmac1 0x1b>, <&dmac1 0x1c>;
690 reg = <0 0xe6c78000 0 64>;
694 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
695 <&dmac1 0x1f>, <&dmac1 0x20>;
705 reg = <0 0xe6c80000 0 64>;
709 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
710 <&dmac1 0x23>, <&dmac1 0x24>;
720 reg = <0 0xe6c20000 0 0x100>;
724 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
725 <&dmac1 0x3d>, <&dmac1 0x3e>;
735 reg = <0 0xe6c30000 0 0x100>;
739 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
740 <&dmac1 0x19>, <&dmac1 0x1a>;
750 reg = <0 0xe6ce0000 0 0x100>;
754 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
755 <&dmac1 0x1d>, <&dmac1 0x1e>;
766 reg = <0 0xe6e60000 0 64>;
771 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
772 <&dmac1 0x29>, <&dmac1 0x2a>;
783 reg = <0 0xe6e68000 0 64>;
788 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
789 <&dmac1 0x2d>, <&dmac1 0x2e>;
799 reg = <0 0xe6e58000 0 64>;
804 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
805 <&dmac1 0x2b>, <&dmac1 0x2c>;
815 reg = <0 0xe6ea8000 0 64>;
820 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
821 <&dmac1 0x2f>, <&dmac1 0x30>;
831 reg = <0 0xe6ee0000 0 64>;
836 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
837 <&dmac1 0xfb>, <&dmac1 0xfc>;
847 reg = <0 0xe6ee8000 0 64>;
852 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
853 <&dmac1 0xfd>, <&dmac1 0xfe>;
863 reg = <0 0xe62c0000 0 96>;
868 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
869 <&dmac1 0x39>, <&dmac1 0x3a>;
879 reg = <0 0xe62c8000 0 96>;
884 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
885 <&dmac1 0x4d>, <&dmac1 0x4e>;
895 reg = <0 0xe62d0000 0 96>;
900 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
901 <&dmac1 0x3b>, <&dmac1 0x3c>;
911 reg = <0 0xe6e80000 0 0x1000>;
924 reg = <0 0xe6e88000 0 0x1000>;
937 reg = <0 0xe6ef0000 0 0x1000>;
948 reg = <0 0xe6ef1000 0 0x1000>;
960 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
965 reg = <0 0xec500000 0 0x1000>, /* SCU */
966 <0 0xec5a0000 0 0x100>, /* ADG */
967 <0 0xec540000 0 0x1000>, /* SSIU */
968 <0 0xec541000 0 0x280>, /* SSI */
969 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
989 "ssi.1", "ssi.0",
992 "ctu.0", "ctu.1",
993 "mix.0", "mix.1",
994 "dvc.0", "dvc.1",
1006 "ssi.1", "ssi.0";
1011 dvc0: dvc-0 {
1012 dmas = <&audma0 0xbc>;
1016 dmas = <&audma0 0xbe>;
1022 mix0: mix-0 { };
1027 ctu00: ctu-0 { };
1038 src-0 {
1043 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1048 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1053 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1058 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1063 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1068 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1074 ssi0: ssi-0 {
1076 dmas = <&audma0 0x01>, <&audma0 0x02>,
1077 <&audma0 0x15>, <&audma0 0x16>;
1082 dmas = <&audma0 0x03>, <&audma0 0x04>,
1083 <&audma0 0x49>, <&audma0 0x4a>;
1088 dmas = <&audma0 0x05>, <&audma0 0x06>,
1089 <&audma0 0x63>, <&audma0 0x64>;
1094 dmas = <&audma0 0x07>, <&audma0 0x08>,
1095 <&audma0 0x6f>, <&audma0 0x70>;
1100 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1101 <&audma0 0x71>, <&audma0 0x72>;
1106 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1107 <&audma0 0x73>, <&audma0 0x74>;
1112 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1113 <&audma0 0x75>, <&audma0 0x76>;
1118 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1119 <&audma0 0x79>, <&audma0 0x7a>;
1124 dmas = <&audma0 0x11>, <&audma0 0x12>,
1125 <&audma0 0x7b>, <&audma0 0x7c>;
1130 dmas = <&audma0 0x13>, <&audma0 0x14>,
1131 <&audma0 0x7d>, <&audma0 0x7e>;
1140 reg = <0 0xec700000 0 0x10000>;
1172 reg = <0 0xee090000 0 0xc00>,
1173 <0 0xee080000 0 0x1100>;
1180 bus-range = <0 0>;
1184 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1185 interrupt-map-mask = <0xf800 0 0 0x7>;
1186 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1187 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1188 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1190 usb@1,0 {
1191 reg = <0x800 0 0 0 0>;
1192 phys = <&usb0 0>;
1196 usb@2,0 {
1197 reg = <0x1000 0 0 0 0>;
1198 phys = <&usb0 0>;
1207 reg = <0 0xee0d0000 0 0xc00>,
1208 <0 0xee0c0000 0 0x1100>;
1219 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1220 interrupt-map-mask = <0xf800 0 0 0x7>;
1221 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1222 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1223 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1225 usb@1,0 {
1226 reg = <0x10800 0 0 0 0>;
1227 phys = <&usb2 0>;
1231 usb@2,0 {
1232 reg = <0x11000 0 0 0 0>;
1233 phys = <&usb2 0>;
1241 reg = <0 0xee100000 0 0x328>;
1244 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1245 <&dmac1 0xcd>, <&dmac1 0xce>;
1256 reg = <0 0xee140000 0 0x100>;
1259 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1260 <&dmac1 0xc1>, <&dmac1 0xc2>;
1271 reg = <0 0xee160000 0 0x100>;
1274 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1275 <&dmac1 0xd3>, <&dmac1 0xd4>;
1286 reg = <0 0xee200000 0 0x80>;
1289 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1290 <&dmac1 0xd1>, <&dmac1 0xd2>;
1301 reg = <0 0xee700000 0 0x400>;
1308 #size-cells = <0>;
1315 #address-cells = <0>;
1317 reg = <0 0xf1001000 0 0x1000>,
1318 <0 0xf1002000 0 0x2000>,
1319 <0 0xf1004000 0 0x2000>,
1320 <0 0xf1006000 0 0x2000>;
1330 reg = <0 0xfe928000 0 0x8000>;
1339 reg = <0 0xfe930000 0 0x8000>;
1348 reg = <0 0xfe940000 0 0x2400>;
1357 reg = <0 0xfeb00000 0 0x40000>;
1361 clock-names = "du.0", "du.1";
1363 reset-names = "du.0";
1368 #size-cells = <0>;
1370 port@0 {
1371 reg = <0>;
1385 reg = <0 0xff000044 0 4>;
1391 reg = <0 0xffca0000 0 0x1004>;
1405 reg = <0 0xe6130000 0 0x1004>;
1434 #clock-cells = <0>;