Lines Matching +full:0 +full:xe6b10000
32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0>;
106 L2_CA15: cache-controller-0 {
117 #clock-cells = <0>;
119 clock-frequency = <0>;
132 #clock-cells = <0>;
134 clock-frequency = <0>;
148 reg = <0 0xe6020000 0 0x0c>;
159 reg = <0 0xe6050000 0 0x50>;
163 gpio-ranges = <&pfc 0 0 32>;
174 reg = <0 0xe6051000 0 0x50>;
178 gpio-ranges = <&pfc 0 32 26>;
189 reg = <0 0xe6052000 0 0x50>;
193 gpio-ranges = <&pfc 0 64 32>;
204 reg = <0 0xe6053000 0 0x50>;
208 gpio-ranges = <&pfc 0 96 32>;
219 reg = <0 0xe6054000 0 0x50>;
223 gpio-ranges = <&pfc 0 128 32>;
234 reg = <0 0xe6055000 0 0x50>;
238 gpio-ranges = <&pfc 0 160 32>;
249 reg = <0 0xe6055400 0 0x50>;
253 gpio-ranges = <&pfc 0 192 32>;
264 reg = <0 0xe6055800 0 0x50>;
268 gpio-ranges = <&pfc 0 224 26>;
278 reg = <0 0xe6060000 0 0x250>;
284 reg = <0 0xe6150000 0 0x1000>;
288 #power-domain-cells = <0>;
294 reg = <0 0xe6152000 0 0x188>;
300 reg = <0 0xe6160000 0 0x0100>;
305 reg = <0 0xe6180000 0 0x0200>;
313 reg = <0 0xe61c0000 0 0x200>;
314 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
333 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
338 #thermal-sensor-cells = <0>;
344 reg = <0 0xe6280000 0 0x1000>;
354 reg = <0 0xe6290000 0 0x1000>;
363 reg = <0 0xe6740000 0 0x1000>;
373 reg = <0 0xec680000 0 0x1000>;
382 reg = <0 0xfe951000 0 0x1000>;
392 reg = <0 0xffc80000 0 0x1000>;
401 reg = <0 0xe62a0000 0 0x1000>;
410 reg = <0 0xe63a0000 0 0x12000>;
413 ranges = <0 0 0xe63a0000 0x12000>;
418 reg = <0 0xe63c0000 0 0x1000>;
421 ranges = <0 0 0xe63c0000 0x1000>;
423 smp-sram@0 {
425 reg = <0 0x100>;
434 #size-cells = <0>;
437 reg = <0 0xe6508000 0 0x40>;
448 #size-cells = <0>;
451 reg = <0 0xe6518000 0 0x40>;
462 #size-cells = <0>;
465 reg = <0 0xe6530000 0 0x40>;
476 #size-cells = <0>;
479 reg = <0 0xe6540000 0 0x40>;
490 #size-cells = <0>;
493 reg = <0 0xe6520000 0 0x40>;
505 #size-cells = <0>;
508 reg = <0 0xe6528000 0 0x40>;
520 #size-cells = <0>;
524 reg = <0 0xe60b0000 0 0x425>;
527 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
528 <&dmac1 0x77>, <&dmac1 0x78>;
537 #size-cells = <0>;
541 reg = <0 0xe6500000 0 0x425>;
544 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
545 <&dmac1 0x61>, <&dmac1 0x62>;
554 #size-cells = <0>;
558 reg = <0 0xe6510000 0 0x425>;
561 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
562 <&dmac1 0x65>, <&dmac1 0x66>;
572 reg = <0 0xe6700000 0 0x20000>;
605 reg = <0 0xe6720000 0 0x20000>;
637 reg = <0 0xe6b10000 0 0x2c>;
640 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
641 <&dmac1 0x17>, <&dmac1 0x18>;
647 #size-cells = <0>;
654 reg = <0 0xe6c40000 0 64>;
658 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
659 <&dmac1 0x21>, <&dmac1 0x22>;
669 reg = <0 0xe6c50000 0 64>;
673 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
674 <&dmac1 0x25>, <&dmac1 0x26>;
684 reg = <0 0xe6c60000 0 64>;
688 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
689 <&dmac1 0x27>, <&dmac1 0x28>;
699 reg = <0 0xe6c70000 0 64>;
703 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
704 <&dmac1 0x1b>, <&dmac1 0x1c>;
714 reg = <0 0xe6c78000 0 64>;
718 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
719 <&dmac1 0x1f>, <&dmac1 0x20>;
729 reg = <0 0xe6c80000 0 64>;
733 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
734 <&dmac1 0x23>, <&dmac1 0x24>;
744 reg = <0 0xe6c20000 0 0x100>;
748 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
749 <&dmac1 0x3d>, <&dmac1 0x3e>;
759 reg = <0 0xe6c30000 0 0x100>;
763 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
764 <&dmac1 0x19>, <&dmac1 0x1a>;
774 reg = <0 0xe6ce0000 0 0x100>;
778 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
779 <&dmac1 0x1d>, <&dmac1 0x1e>;
789 reg = <0 0xe6e60000 0 64>;
794 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
795 <&dmac1 0x29>, <&dmac1 0x2a>;
805 reg = <0 0xe6e68000 0 64>;
810 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
811 <&dmac1 0x2d>, <&dmac1 0x2e>;
821 reg = <0 0xe6e58000 0 64>;
826 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
827 <&dmac1 0x2b>, <&dmac1 0x2c>;
837 reg = <0 0xe6ea8000 0 64>;
842 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
843 <&dmac1 0x2f>, <&dmac1 0x30>;
853 reg = <0 0xe6ee0000 0 64>;
858 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
859 <&dmac1 0xfb>, <&dmac1 0xfc>;
869 reg = <0 0xe6ee8000 0 64>;
874 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
875 <&dmac1 0xfd>, <&dmac1 0xfe>;
885 reg = <0 0xe62c0000 0 96>;
890 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
891 <&dmac1 0x39>, <&dmac1 0x3a>;
901 reg = <0 0xe62c8000 0 96>;
906 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
907 <&dmac1 0x4d>, <&dmac1 0x4e>;
917 reg = <0 0xe62d0000 0 96>;
922 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
923 <&dmac1 0x3b>, <&dmac1 0x3c>;
933 reg = <0 0xe6e80000 0 0x1000>;
946 reg = <0 0xe6e88000 0 0x1000>;
959 reg = <0 0xe6ef0000 0 0x1000>;
970 reg = <0 0xe6ef1000 0 0x1000>;
981 reg = <0 0xe6ef2000 0 0x1000>;
993 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
998 reg = <0 0xec500000 0 0x1000>, /* SCU */
999 <0 0xec5a0000 0 0x100>, /* ADG */
1000 <0 0xec540000 0 0x1000>, /* SSIU */
1001 <0 0xec541000 0 0x280>, /* SSI */
1002 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1022 "ssi.1", "ssi.0",
1025 "src.1", "src.0",
1026 "dvc.0", "dvc.1",
1038 "ssi.1", "ssi.0";
1043 dvc0: dvc-0 {
1044 dmas = <&audma1 0xbc>;
1048 dmas = <&audma1 0xbe>;
1054 src0: src-0 {
1056 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1061 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1066 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1071 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1076 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1081 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1086 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1091 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1096 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1101 dmas = <&audma0 0x97>, <&audma1 0xba>;
1107 ssi0: ssi-0 {
1109 dmas = <&audma0 0x01>, <&audma1 0x02>,
1110 <&audma0 0x15>, <&audma1 0x16>;
1115 dmas = <&audma0 0x03>, <&audma1 0x04>,
1116 <&audma0 0x49>, <&audma1 0x4a>;
1121 dmas = <&audma0 0x05>, <&audma1 0x06>,
1122 <&audma0 0x63>, <&audma1 0x64>;
1127 dmas = <&audma0 0x07>, <&audma1 0x08>,
1128 <&audma0 0x6f>, <&audma1 0x70>;
1133 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1134 <&audma0 0x71>, <&audma1 0x72>;
1139 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1140 <&audma0 0x73>, <&audma1 0x74>;
1145 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1146 <&audma0 0x75>, <&audma1 0x76>;
1151 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1152 <&audma0 0x79>, <&audma1 0x7a>;
1157 dmas = <&audma0 0x11>, <&audma1 0x12>,
1158 <&audma0 0x7b>, <&audma1 0x7c>;
1163 dmas = <&audma0 0x13>, <&audma1 0x14>,
1164 <&audma0 0x7d>, <&audma1 0x7e>;
1173 reg = <0 0xec700000 0 0x10000>;
1204 reg = <0 0xec720000 0 0x10000>;
1235 reg = <0 0xee100000 0 0x328>;
1238 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1239 <&dmac1 0xcd>, <&dmac1 0xce>;
1250 reg = <0 0xee140000 0 0x100>;
1253 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1254 <&dmac1 0xc1>, <&dmac1 0xc2>;
1265 reg = <0 0xee160000 0 0x100>;
1268 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1269 <&dmac1 0xd3>, <&dmac1 0xd4>;
1280 reg = <0 0xee200000 0 0x80>;
1283 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1284 <&dmac1 0xd1>, <&dmac1 0xd2>;
1296 reg = <0 0xee700000 0 0x400>;
1303 #size-cells = <0>;
1310 #address-cells = <0>;
1312 reg = <0 0xf1001000 0 0x1000>,
1313 <0 0xf1002000 0 0x2000>,
1314 <0 0xf1004000 0 0x2000>,
1315 <0 0xf1006000 0 0x2000>;
1325 reg = <0 0xfe940000 0 0x2400>;
1334 reg = <0 0xfe944000 0 0x2400>;
1343 reg = <0 0xfeb00000 0 0x40000>;
1347 clock-names = "du.0", "du.1";
1349 reset-names = "du.0";
1354 #size-cells = <0>;
1356 port@0 {
1357 reg = <0>;
1372 reg = <0 0xfeb90000 0 0x1c>;
1381 #size-cells = <0>;
1383 port@0 {
1384 reg = <0>;
1399 reg = <0 0xff000044 0 4>;
1405 reg = <0 0xffca0000 0 0x1004>;
1419 reg = <0 0xe6130000 0 0x1004>;
1439 polling-delay-passive = <0>;
1440 polling-delay = <0>;
1447 hysteresis = <0>;
1467 #clock-cells = <0>;