Lines Matching +full:thermal +full:- +full:r8a7779
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
15 compatible = "renesas,r8a7779";
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a9";
28 clock-frequency = <1000000000>;
33 compatible = "arm,cortex-a9";
35 clock-frequency = <1000000000>;
37 power-domains = <&sysc R8A7779_PD_ARM1>;
41 compatible = "arm,cortex-a9";
43 clock-frequency = <1000000000>;
45 power-domains = <&sysc R8A7779_PD_ARM2>;
49 compatible = "arm,cortex-a9";
51 clock-frequency = <1000000000>;
53 power-domains = <&sysc R8A7779_PD_ARM3>;
63 gic: interrupt-controller@f0001000 {
64 compatible = "arm,cortex-a9-gic";
65 #interrupt-cells = <3>;
66 interrupt-controller;
72 compatible = "arm,cortex-a9-global-timer";
80 compatible = "arm,cortex-a9-twd-timer";
88 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
91 #gpio-cells = <2>;
92 gpio-controller;
93 gpio-ranges = <&pfc 0 0 32>;
94 #interrupt-cells = <2>;
95 interrupt-controller;
99 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
102 #gpio-cells = <2>;
103 gpio-controller;
104 gpio-ranges = <&pfc 0 32 32>;
105 #interrupt-cells = <2>;
106 interrupt-controller;
110 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
113 #gpio-cells = <2>;
114 gpio-controller;
115 gpio-ranges = <&pfc 0 64 32>;
116 #interrupt-cells = <2>;
117 interrupt-controller;
121 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
124 #gpio-cells = <2>;
125 gpio-controller;
126 gpio-ranges = <&pfc 0 96 32>;
127 #interrupt-cells = <2>;
128 interrupt-controller;
132 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
135 #gpio-cells = <2>;
136 gpio-controller;
137 gpio-ranges = <&pfc 0 128 32>;
138 #interrupt-cells = <2>;
139 interrupt-controller;
143 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
146 #gpio-cells = <2>;
147 gpio-controller;
148 gpio-ranges = <&pfc 0 160 32>;
149 #interrupt-cells = <2>;
150 interrupt-controller;
154 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
157 #gpio-cells = <2>;
158 gpio-controller;
159 gpio-ranges = <&pfc 0 192 9>;
160 #interrupt-cells = <2>;
161 interrupt-controller;
164 irqpin0: interrupt-controller@fe78001c {
165 compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
166 #interrupt-cells = <2>;
168 interrupt-controller;
179 sense-bitfield-width = <2>;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
189 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
200 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
201 i2c-scl-internal-delay-ns = <5>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
212 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
213 i2c-scl-internal-delay-ns = <5>;
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
224 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
225 i2c-scl-internal-delay-ns = <5>;
230 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
236 clock-names = "fck", "brg_int", "scif_clk";
237 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
242 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
248 clock-names = "fck", "brg_int", "scif_clk";
249 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
254 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
260 clock-names = "fck", "brg_int", "scif_clk";
261 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
266 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
272 clock-names = "fck", "brg_int", "scif_clk";
273 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
278 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
284 clock-names = "fck", "brg_int", "scif_clk";
285 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
290 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
296 clock-names = "fck", "brg_int", "scif_clk";
297 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
302 compatible = "renesas,hscif-r8a7779",
303 "renesas,rcar-gen1-hscif", "renesas,hscif";
309 clock-names = "fck", "brg_int", "scif_clk";
310 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
315 compatible = "renesas,hscif-r8a7779",
316 "renesas,rcar-gen1-hscif", "renesas,hscif";
322 clock-names = "fck", "brg_int", "scif_clk";
323 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
328 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
331 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
332 #pwm-cells = <2>;
337 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
340 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
341 #pwm-cells = <2>;
346 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
349 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
350 #pwm-cells = <2>;
355 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
358 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
359 #pwm-cells = <2>;
364 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
367 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
368 #pwm-cells = <2>;
373 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
376 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
377 #pwm-cells = <2>;
382 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
385 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
386 #pwm-cells = <2>;
391 compatible = "renesas,pfc-r8a7779";
395 thermal@ffc48000 {
396 compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal";
401 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
407 clock-names = "fck";
408 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
416 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
422 clock-names = "fck";
423 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
431 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
437 clock-names = "fck";
438 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
446 compatible = "renesas,sata-r8a7779";
450 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
455 compatible = "renesas,sdhi-r8a7779",
456 "renesas,rcar-gen1-sdhi";
460 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
465 compatible = "renesas,sdhi-r8a7779",
466 "renesas,rcar-gen1-sdhi";
470 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
475 compatible = "renesas,sdhi-r8a7779",
476 "renesas,rcar-gen1-sdhi";
480 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
485 compatible = "renesas,sdhi-r8a7779",
486 "renesas,rcar-gen1-sdhi";
490 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
495 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
498 #address-cells = <1>;
499 #size-cells = <0>;
501 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
506 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
509 #address-cells = <1>;
510 #size-cells = <0>;
512 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
517 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
520 #address-cells = <1>;
521 #size-cells = <0>;
523 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
528 compatible = "renesas,du-r8a7779";
532 clock-names = "du.0";
533 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
537 #address-cells = <1>;
538 #size-cells = <0>;
554 #address-cells = <1>;
555 #size-cells = <1>;
560 compatible = "fixed-clock";
561 #clock-cells = <0>;
563 clock-frequency = <0>;
568 compatible = "fixed-clock";
569 #clock-cells = <0>;
571 clock-frequency = <0>;
576 compatible = "renesas,r8a7779-cpg-clocks";
579 #clock-cells = <1>;
580 clock-output-names = "plla", "z", "zs", "s",
582 #power-domain-cells = <0>;
587 compatible = "fixed-factor-clock";
589 #clock-cells = <0>;
590 clock-div = <2>;
591 clock-mult = <1>;
594 compatible = "fixed-factor-clock";
596 #clock-cells = <0>;
597 clock-div = <8>;
598 clock-mult = <1>;
601 compatible = "fixed-factor-clock";
603 #clock-cells = <0>;
604 clock-div = <16>;
605 clock-mult = <1>;
608 compatible = "fixed-factor-clock";
610 #clock-cells = <0>;
611 clock-div = <24>;
612 clock-mult = <1>;
617 compatible = "renesas,r8a7779-mstp-clocks",
618 "renesas,cpg-mstp-clocks";
637 #clock-cells = <1>;
638 clock-indices = <
649 clock-output-names =
656 compatible = "renesas,r8a7779-mstp-clocks",
657 "renesas,cpg-mstp-clocks";
669 #clock-cells = <1>;
670 clock-indices = <
677 clock-output-names =
685 compatible = "renesas,r8a7779-mstp-clocks",
686 "renesas,cpg-mstp-clocks";
690 #clock-cells = <1>;
691 clock-indices = <
696 clock-output-names =
703 compatible = "simple-bus";
704 #address-cells = <1>;
705 #size-cells = <1>;
714 rst: reset-controller@ffcc0000 {
715 compatible = "renesas,r8a7779-reset-wdt";
719 sysc: system-controller@ffd85000 {
720 compatible = "renesas,r8a7779-sysc";
722 #power-domain-cells = <1>;