Lines Matching +full:pwm +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a9";
28 clock-frequency = <1000000000>;
33 compatible = "arm,cortex-a9";
35 clock-frequency = <1000000000>;
37 power-domains = <&sysc R8A7779_PD_ARM1>;
41 compatible = "arm,cortex-a9";
43 clock-frequency = <1000000000>;
45 power-domains = <&sysc R8A7779_PD_ARM2>;
49 compatible = "arm,cortex-a9";
51 clock-frequency = <1000000000>;
53 power-domains = <&sysc R8A7779_PD_ARM3>;
63 gic: interrupt-controller@f0001000 {
64 compatible = "arm,cortex-a9-gic";
65 #interrupt-cells = <3>;
66 interrupt-controller;
72 compatible = "arm,cortex-a9-global-timer";
80 compatible = "arm,cortex-a9-twd-timer";
88 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
91 #gpio-cells = <2>;
92 gpio-controller;
93 gpio-ranges = <&pfc 0 0 32>;
94 #interrupt-cells = <2>;
95 interrupt-controller;
99 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
102 #gpio-cells = <2>;
103 gpio-controller;
104 gpio-ranges = <&pfc 0 32 32>;
105 #interrupt-cells = <2>;
106 interrupt-controller;
110 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
113 #gpio-cells = <2>;
114 gpio-controller;
115 gpio-ranges = <&pfc 0 64 32>;
116 #interrupt-cells = <2>;
117 interrupt-controller;
121 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
124 #gpio-cells = <2>;
125 gpio-controller;
126 gpio-ranges = <&pfc 0 96 32>;
127 #interrupt-cells = <2>;
128 interrupt-controller;
132 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
135 #gpio-cells = <2>;
136 gpio-controller;
137 gpio-ranges = <&pfc 0 128 32>;
138 #interrupt-cells = <2>;
139 interrupt-controller;
143 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
146 #gpio-cells = <2>;
147 gpio-controller;
148 gpio-ranges = <&pfc 0 160 32>;
149 #interrupt-cells = <2>;
150 interrupt-controller;
154 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
157 #gpio-cells = <2>;
158 gpio-controller;
159 gpio-ranges = <&pfc 0 192 9>;
160 #interrupt-cells = <2>;
161 interrupt-controller;
164 irqpin0: interrupt-controller@fe78001c {
165 compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
166 #interrupt-cells = <2>;
168 interrupt-controller;
179 sense-bitfield-width = <2>;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
189 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
200 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
201 i2c-scl-internal-delay-ns = <5>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
212 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
213 i2c-scl-internal-delay-ns = <5>;
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
224 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
225 i2c-scl-internal-delay-ns = <5>;
230 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
236 clock-names = "fck", "brg_int", "scif_clk";
237 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
242 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
248 clock-names = "fck", "brg_int", "scif_clk";
249 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
254 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
260 clock-names = "fck", "brg_int", "scif_clk";
261 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
266 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
272 clock-names = "fck", "brg_int", "scif_clk";
273 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
278 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
284 clock-names = "fck", "brg_int", "scif_clk";
285 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
290 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
296 clock-names = "fck", "brg_int", "scif_clk";
297 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
302 compatible = "renesas,hscif-r8a7779",
303 "renesas,rcar-gen1-hscif", "renesas,hscif";
309 clock-names = "fck", "brg_int", "scif_clk";
310 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
315 compatible = "renesas,hscif-r8a7779",
316 "renesas,rcar-gen1-hscif", "renesas,hscif";
322 clock-names = "fck", "brg_int", "scif_clk";
323 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
327 pwm0: pwm@ffe50000 {
328 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
331 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
332 #pwm-cells = <2>;
336 pwm1: pwm@ffe51000 {
337 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
340 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
341 #pwm-cells = <2>;
345 pwm2: pwm@ffe52000 {
346 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
349 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
350 #pwm-cells = <2>;
354 pwm3: pwm@ffe53000 {
355 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
358 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
359 #pwm-cells = <2>;
363 pwm4: pwm@ffe54000 {
364 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
367 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
368 #pwm-cells = <2>;
372 pwm5: pwm@ffe55000 {
373 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
376 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
377 #pwm-cells = <2>;
381 pwm6: pwm@ffe56000 {
382 compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar";
385 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
386 #pwm-cells = <2>;
391 compatible = "renesas,pfc-r8a7779";
396 compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal";
401 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
407 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
409 clock-names = "fck";
410 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
418 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
424 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
426 clock-names = "fck";
427 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
435 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
440 interrupt-names = "tuni0", "tuni1", "tuni2";
442 clock-names = "fck";
443 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
451 compatible = "renesas,sata-r8a7779";
455 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
460 compatible = "renesas,sdhi-r8a7779",
461 "renesas,rcar-gen1-sdhi";
465 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
470 compatible = "renesas,sdhi-r8a7779",
471 "renesas,rcar-gen1-sdhi";
475 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
480 compatible = "renesas,sdhi-r8a7779",
481 "renesas,rcar-gen1-sdhi";
485 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
490 compatible = "renesas,sdhi-r8a7779",
491 "renesas,rcar-gen1-sdhi";
495 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
500 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
503 #address-cells = <1>;
504 #size-cells = <0>;
506 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
511 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
514 #address-cells = <1>;
515 #size-cells = <0>;
517 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
522 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
525 #address-cells = <1>;
526 #size-cells = <0>;
528 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
533 compatible = "renesas,du-r8a7779";
537 clock-names = "du.0";
538 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
542 #address-cells = <1>;
543 #size-cells = <0>;
559 #address-cells = <1>;
560 #size-cells = <1>;
563 /* External root clock */
565 compatible = "fixed-clock";
566 #clock-cells = <0>;
568 clock-frequency = <0>;
571 /* External SCIF clock */
573 compatible = "fixed-clock";
574 #clock-cells = <0>;
576 clock-frequency = <0>;
581 compatible = "renesas,r8a7779-cpg-clocks";
584 #clock-cells = <1>;
585 clock-output-names = "plla", "z", "zs", "s",
587 #power-domain-cells = <0>;
592 compatible = "fixed-factor-clock";
594 #clock-cells = <0>;
595 clock-div = <2>;
596 clock-mult = <1>;
599 compatible = "fixed-factor-clock";
601 #clock-cells = <0>;
602 clock-div = <8>;
603 clock-mult = <1>;
606 compatible = "fixed-factor-clock";
608 #clock-cells = <0>;
609 clock-div = <16>;
610 clock-mult = <1>;
613 compatible = "fixed-factor-clock";
615 #clock-cells = <0>;
616 clock-div = <24>;
617 clock-mult = <1>;
622 compatible = "renesas,r8a7779-mstp-clocks",
623 "renesas,cpg-mstp-clocks";
642 #clock-cells = <1>;
643 clock-indices = <
654 clock-output-names =
655 "pwm", "hspi", "tmu2", "tmu1", "tmu0",
661 compatible = "renesas,r8a7779-mstp-clocks",
662 "renesas,cpg-mstp-clocks";
674 #clock-cells = <1>;
675 clock-indices = <
682 clock-output-names =
690 compatible = "renesas,r8a7779-mstp-clocks",
691 "renesas,cpg-mstp-clocks";
695 #clock-cells = <1>;
696 clock-indices = <
701 clock-output-names =
708 compatible = "simple-bus";
709 #address-cells = <1>;
710 #size-cells = <1>;
719 rst: reset-controller@ffcc0000 {
720 compatible = "renesas,r8a7779-reset-wdt";
724 sysc: system-controller@ffd85000 {
725 compatible = "renesas,r8a7779-sysc";
727 #power-domain-cells = <1>;