Lines Matching +full:0 +full:xffc48000
22 #size-cells = <0>;
24 cpu@0 {
27 reg = <0>;
67 reg = <0xf0001000 0x1000>,
68 <0xf0000100 0x100>;
73 reg = <0xf0000200 0x100>;
81 reg = <0xf0000600 0x20>;
89 reg = <0xffc40000 0x2c>;
93 gpio-ranges = <&pfc 0 0 32>;
100 reg = <0xffc41000 0x2c>;
104 gpio-ranges = <&pfc 0 32 32>;
111 reg = <0xffc42000 0x2c>;
115 gpio-ranges = <&pfc 0 64 32>;
122 reg = <0xffc43000 0x2c>;
126 gpio-ranges = <&pfc 0 96 32>;
133 reg = <0xffc44000 0x2c>;
137 gpio-ranges = <&pfc 0 128 32>;
144 reg = <0xffc45000 0x2c>;
148 gpio-ranges = <&pfc 0 160 32>;
155 reg = <0xffc46000 0x2c>;
159 gpio-ranges = <&pfc 0 192 9>;
169 reg = <0xfe78001c 4>,
170 <0xfe780010 4>,
171 <0xfe780024 4>,
172 <0xfe780044 4>,
173 <0xfe780064 4>,
174 <0xfe780000 4>;
184 #size-cells = <0>;
186 reg = <0xffc70000 0x1000>;
195 #size-cells = <0>;
197 reg = <0xffc71000 0x1000>;
207 #size-cells = <0>;
209 reg = <0xffc72000 0x1000>;
219 #size-cells = <0>;
221 reg = <0xffc73000 0x1000>;
232 reg = <0xffe40000 0x100>;
244 reg = <0xffe41000 0x100>;
256 reg = <0xffe42000 0x100>;
268 reg = <0xffe43000 0x100>;
280 reg = <0xffe44000 0x100>;
292 reg = <0xffe45000 0x100>;
304 reg = <0xffe48000 96>;
317 reg = <0xffe49000 96>;
329 reg = <0xffe50000 0x8>;
338 reg = <0xffe51000 0x8>;
347 reg = <0xffe52000 0x8>;
356 reg = <0xffe53000 0x8>;
365 reg = <0xffe54000 0x8>;
374 reg = <0xffe55000 0x8>;
383 reg = <0xffe56000 0x8>;
392 reg = <0xfffc0000 0x23c>;
397 reg = <0xffc48000 0x38>;
402 reg = <0xffd80000 0x30>;
417 reg = <0xffd81000 0x30>;
432 reg = <0xffd82000 0x30>;
447 reg = <0xfc600000 0x200000>;
457 reg = <0xffe4c000 0x100>;
467 reg = <0xffe4d000 0x100>;
477 reg = <0xffe4e000 0x100>;
487 reg = <0xffe4f000 0x100>;
496 reg = <0xfffc7000 0x18>;
499 #size-cells = <0>;
507 reg = <0xfffc8000 0x18>;
510 #size-cells = <0>;
518 reg = <0xfffc6000 0x18>;
521 #size-cells = <0>;
529 reg = <0xfff80000 0x40000>;
532 clock-names = "du.0";
538 #size-cells = <0>;
540 port@0 {
541 reg = <0>;
561 #clock-cells = <0>;
563 clock-frequency = <0>;
569 #clock-cells = <0>;
571 clock-frequency = <0>;
577 reg = <0xffc80000 0x30>;
582 #power-domain-cells = <0>;
589 #clock-cells = <0>;
596 #clock-cells = <0>;
603 #clock-cells = <0>;
610 #clock-cells = <0>;
619 reg = <0xffc80030 4>;
658 reg = <0xffc80034 4>, <0xffc80044 4>;
687 reg = <0xffc8003c 4>;
706 ranges = <0 0 0x1c000000>;
711 reg = <0xff000044 4>;
716 reg = <0xffcc0000 0x48>;
721 reg = <0xffd85000 0x0200>;