Lines Matching +full:0 +full:xe6b10000
19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0>;
142 reg = <0x100>;
152 reg = <0x101>;
162 reg = <0x102>;
172 reg = <0x103>;
179 L2_CA15: cache-controller-0 {
197 #clock-cells = <0>;
199 clock-frequency = <0>;
205 #clock-cells = <0>;
206 clock-frequency = <0>;
209 pmu-0 {
230 #clock-cells = <0>;
232 clock-frequency = <0>;
246 reg = <0 0xe6020000 0 0x0c>;
257 reg = <0 0xe6050000 0 0x50>;
261 gpio-ranges = <&pfc 0 0 32>;
272 reg = <0 0xe6051000 0 0x50>;
276 gpio-ranges = <&pfc 0 32 30>;
287 reg = <0 0xe6052000 0 0x50>;
291 gpio-ranges = <&pfc 0 64 30>;
302 reg = <0 0xe6053000 0 0x50>;
306 gpio-ranges = <&pfc 0 96 32>;
317 reg = <0 0xe6054000 0 0x50>;
321 gpio-ranges = <&pfc 0 128 32>;
332 reg = <0 0xe6055000 0 0x50>;
336 gpio-ranges = <&pfc 0 160 32>;
346 reg = <0 0xe6060000 0 0x250>;
351 reg = <0 0xe60f0000 0 0x148>;
362 reg = <0 0xe6150000 0 0x1000>;
366 #power-domain-cells = <0>;
372 reg = <0 0xe6151000 0 0x188>;
378 reg = <0 0xe6152000 0 0x188>;
384 reg = <0 0xe6160000 0 0x0100>;
389 reg = <0 0xe6180000 0 0x0200>;
397 reg = <0 0xe61c0000 0 0x200>;
398 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
410 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
415 #thermal-sensor-cells = <0>;
421 reg = <0 0xe6280000 0 0x1000>;
431 reg = <0 0xe6290000 0 0x1000>;
440 reg = <0 0xe6740000 0 0x1000>;
450 reg = <0 0xec680000 0 0x1000>;
459 reg = <0 0xfe951000 0 0x1000>;
468 reg = <0 0xe63a0000 0 0x12000>;
471 ranges = <0 0 0xe63a0000 0x12000>;
476 reg = <0 0xe63c0000 0 0x1000>;
479 ranges = <0 0 0xe63c0000 0x1000>;
481 smp-sram@0 {
483 reg = <0 0x100>;
489 reg = <0 0xe6300000 0 0x40000>;
492 ranges = <0 0 0xe6300000 0x40000>;
497 #size-cells = <0>;
500 reg = <0 0xe6508000 0 0x40>;
511 #size-cells = <0>;
514 reg = <0 0xe6518000 0 0x40>;
525 #size-cells = <0>;
528 reg = <0 0xe6530000 0 0x40>;
539 #size-cells = <0>;
542 reg = <0 0xe6540000 0 0x40>;
553 #size-cells = <0>;
557 reg = <0 0xe6500000 0 0x425>;
560 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
561 <&dmac1 0x61>, <&dmac1 0x62>;
570 #size-cells = <0>;
574 reg = <0 0xe6510000 0 0x425>;
577 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
578 <&dmac1 0x65>, <&dmac1 0x66>;
587 #size-cells = <0>;
591 reg = <0 0xe6520000 0 0x425>;
594 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
595 <&dmac1 0x69>, <&dmac1 0x6a>;
604 #size-cells = <0>;
608 reg = <0 0xe60b0000 0 0x425>;
611 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
612 <&dmac1 0x77>, <&dmac1 0x78>;
622 reg = <0 0xe6590000 0 0x100>;
625 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
626 <&usb_dmac1 0>, <&usb_dmac1 1>;
639 reg = <0 0xe6590100 0 0x100>;
641 #size-cells = <0>;
648 usb0: usb-phy@0 {
649 reg = <0>;
661 reg = <0 0xe65a0000 0 0x100>;
675 reg = <0 0xe65b0000 0 0x100>;
689 reg = <0 0xe6700000 0 0x20000>;
722 reg = <0 0xe6720000 0 0x20000>;
755 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
762 #size-cells = <0>;
768 reg = <0 0xe6b10000 0 0x2c>;
771 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
772 <&dmac1 0x17>, <&dmac1 0x18>;
778 #size-cells = <0>;
785 reg = <0 0xe6c40000 0 0x40>;
789 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
790 <&dmac1 0x21>, <&dmac1 0x22>;
800 reg = <0 0xe6c50000 0 0x40>;
804 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
805 <&dmac1 0x25>, <&dmac1 0x26>;
815 reg = <0 0xe6c60000 0 0x40>;
819 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
820 <&dmac1 0x27>, <&dmac1 0x28>;
830 reg = <0 0xe6c20000 0 0x100>;
834 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
835 <&dmac1 0x3d>, <&dmac1 0x3e>;
845 reg = <0 0xe6c30000 0 0x100>;
849 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
850 <&dmac1 0x19>, <&dmac1 0x1a>;
860 reg = <0 0xe6ce0000 0 0x100>;
864 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
865 <&dmac1 0x1d>, <&dmac1 0x1e>;
875 reg = <0 0xe6e60000 0 0x40>;
880 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
881 <&dmac1 0x29>, <&dmac1 0x2a>;
891 reg = <0 0xe6e68000 0 0x40>;
896 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
897 <&dmac1 0x2d>, <&dmac1 0x2e>;
907 reg = <0 0xe6e56000 0 0x40>;
912 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
913 <&dmac1 0x2b>, <&dmac1 0x2c>;
923 reg = <0 0xe62c0000 0 0x60>;
928 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
929 <&dmac1 0x39>, <&dmac1 0x3a>;
939 reg = <0 0xe62c8000 0 0x60>;
944 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
945 <&dmac1 0x4d>, <&dmac1 0x4e>;
955 reg = <0 0xe6e20000 0 0x0064>;
957 clocks = <&cpg CPG_MOD 0>;
958 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
959 <&dmac1 0x51>, <&dmac1 0x52>;
962 resets = <&cpg 0>;
964 #size-cells = <0>;
971 reg = <0 0xe6e10000 0 0x0064>;
974 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
975 <&dmac1 0x55>, <&dmac1 0x56>;
980 #size-cells = <0>;
987 reg = <0 0xe6e00000 0 0x0064>;
990 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
991 <&dmac1 0x41>, <&dmac1 0x42>;
996 #size-cells = <0>;
1003 reg = <0 0xe6c90000 0 0x0064>;
1006 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1007 <&dmac1 0x45>, <&dmac1 0x46>;
1012 #size-cells = <0>;
1019 reg = <0 0xe6e80000 0 0x1000>;
1032 reg = <0 0xe6e88000 0 0x1000>;
1044 reg = <0 0xe6e30000 0 0x8>;
1054 reg = <0 0xe6e31000 0 0x8>;
1064 reg = <0 0xe6e32000 0 0x8>;
1074 reg = <0 0xe6e33000 0 0x8>;
1084 reg = <0 0xe6e34000 0 0x8>;
1094 reg = <0 0xe6e35000 0 0x8>;
1104 reg = <0 0xe6e36000 0 0x8>;
1115 reg = <0 0xe6ef0000 0 0x1000>;
1126 reg = <0 0xe6ef1000 0 0x1000>;
1137 reg = <0 0xe6ef2000 0 0x1000>;
1148 reg = <0 0xe6ef3000 0 0x1000>;
1160 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1165 reg = <0 0xec500000 0 0x1000>, /* SCU */
1166 <0 0xec5a0000 0 0x100>, /* ADG */
1167 <0 0xec540000 0 0x1000>, /* SSIU */
1168 <0 0xec541000 0 0x280>, /* SSI */
1169 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1191 "ssi.1", "ssi.0",
1194 "src.1", "src.0",
1195 "ctu.0", "ctu.1",
1196 "mix.0", "mix.1",
1197 "dvc.0", "dvc.1",
1209 "ssi.1", "ssi.0";
1214 dvc0: dvc-0 {
1215 dmas = <&audma1 0xbc>;
1219 dmas = <&audma1 0xbe>;
1225 mix0: mix-0 { };
1230 ctu00: ctu-0 { };
1241 src0: src-0 {
1243 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1248 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1253 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1258 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1263 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1268 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1273 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1278 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1283 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1288 dmas = <&audma0 0x97>, <&audma1 0xba>;
1294 ssi0: ssi-0 {
1296 dmas = <&audma0 0x01>, <&audma1 0x02>,
1297 <&audma0 0x15>, <&audma1 0x16>;
1302 dmas = <&audma0 0x03>, <&audma1 0x04>,
1303 <&audma0 0x49>, <&audma1 0x4a>;
1308 dmas = <&audma0 0x05>, <&audma1 0x06>,
1309 <&audma0 0x63>, <&audma1 0x64>;
1314 dmas = <&audma0 0x07>, <&audma1 0x08>,
1315 <&audma0 0x6f>, <&audma1 0x70>;
1320 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1321 <&audma0 0x71>, <&audma1 0x72>;
1326 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1327 <&audma0 0x73>, <&audma1 0x74>;
1332 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1333 <&audma0 0x75>, <&audma1 0x76>;
1338 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1339 <&audma0 0x79>, <&audma1 0x7a>;
1344 dmas = <&audma0 0x11>, <&audma1 0x12>,
1345 <&audma0 0x7b>, <&audma1 0x7c>;
1350 dmas = <&audma0 0x13>, <&audma1 0x14>,
1351 <&audma0 0x7d>, <&audma1 0x7e>;
1360 reg = <0 0xec700000 0 0x10000>;
1391 reg = <0 0xec720000 0 0x10000>;
1422 reg = <0 0xee000000 0 0xc00>;
1436 reg = <0 0xee090000 0 0xc00>,
1437 <0 0xee080000 0 0x1100>;
1444 bus-range = <0 0>;
1448 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1449 interrupt-map-mask = <0xf800 0 0 0x7>;
1450 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1451 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1452 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1454 usb@1,0 {
1455 reg = <0x800 0 0 0 0>;
1456 phys = <&usb0 0>;
1460 usb@2,0 {
1461 reg = <0x1000 0 0 0 0>;
1462 phys = <&usb0 0>;
1471 reg = <0 0xee0b0000 0 0xc00>,
1472 <0 0xee0a0000 0 0x1100>;
1483 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1484 interrupt-map-mask = <0xf800 0 0 0x7>;
1485 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1486 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1487 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1497 reg = <0 0xee0d0000 0 0xc00>,
1498 <0 0xee0c0000 0 0x1100>;
1506 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1507 interrupt-map-mask = <0xf800 0 0 0x7>;
1508 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1509 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1510 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1512 usb@1,0 {
1513 reg = <0x20800 0 0 0 0>;
1514 phys = <&usb2 0>;
1518 usb@2,0 {
1519 reg = <0x21000 0 0 0 0>;
1520 phys = <&usb2 0>;
1528 reg = <0 0xee100000 0 0x328>;
1531 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1532 <&dmac1 0xcd>, <&dmac1 0xce>;
1543 reg = <0 0xee120000 0 0x328>;
1546 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1547 <&dmac1 0xc9>, <&dmac1 0xca>;
1558 reg = <0 0xee140000 0 0x100>;
1561 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1562 <&dmac1 0xc1>, <&dmac1 0xc2>;
1573 reg = <0 0xee160000 0 0x100>;
1576 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1577 <&dmac1 0xd3>, <&dmac1 0xd4>;
1588 reg = <0 0xee200000 0 0x80>;
1591 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1592 <&dmac1 0xd1>, <&dmac1 0xd2>;
1604 reg = <0 0xee220000 0 0x80>;
1607 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1608 <&dmac1 0xe1>, <&dmac1 0xe2>;
1620 reg = <0 0xee300000 0 0x200000>;
1631 reg = <0 0xee500000 0 0x200000>;
1642 reg = <0 0xee700000 0 0x400>;
1649 #size-cells = <0>;
1656 #address-cells = <0>;
1658 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1659 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1670 reg = <0 0xfe000000 0 0x80000>;
1673 bus-range = <0x00 0xff>;
1675 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1676 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1677 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1678 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1680 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1681 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1686 interrupt-map-mask = <0 0 0 0>;
1687 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1697 reg = <0 0xfe920000 0 0x8000>;
1706 reg = <0 0xfe928000 0 0x8000>;
1715 reg = <0 0xfe930000 0 0x8000>;
1724 reg = <0 0xfe938000 0 0x8000>;
1733 reg = <0 0xfeb00000 0 0x70000>;
1739 clock-names = "du.0", "du.1", "du.2";
1741 reset-names = "du.0";
1746 #size-cells = <0>;
1748 port@0 {
1749 reg = <0>;
1770 reg = <0 0xfeb90000 0 0x14>;
1778 #size-cells = <0>;
1780 port@0 {
1781 reg = <0>;
1796 reg = <0 0xfeb94000 0 0x14>;
1804 #size-cells = <0>;
1806 port@0 {
1807 reg = <0>;
1822 reg = <0 0xff000044 0 4>;
1828 reg = <0 0xffca0000 0 0x1004>;
1841 reg = <0 0xe6130000 0 0x1004>;
1860 polling-delay-passive = <0>;
1861 polling-delay = <0>;
1868 hysteresis = <0>;
1888 #clock-cells = <0>;